A Performance Study of Out-of-order Vector Architectures and Short Registers. Villa, L., Espasa, R., & Valero, M. In Proceedings of International Conference on Supercomputing, pages 37-44, 1998.
A Performance Study of Out-of-order Vector Architectures and Short Registers [link]Paper  bibtex   
@inproceedings{ dblp4387345,
  title = {A Performance Study of Out-of-order Vector Architectures and Short Registers},
  author = {Luis Villa and Roger Espasa and Mateo Valero},
  author_short = {Villa, L. and Espasa, R. and Valero, M.},
  bibtype = {inproceedings},
  type = {inproceedings},
  year = {1998},
  key = {dblp4387345},
  id = {dblp4387345},
  biburl = {http://www.dblp.org/rec/bibtex/conf/ics/VillaEV98},
  url = {http://doi.acm.org/10.1145/277830.277844},
  conference = {International Conference on Supercomputing},
  pages = {37-44},
  text = {International Conference on Supercomputing 1998:37-44},
  booktitle = {Proceedings of International Conference on Supercomputing}
}

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