{"_id":"3SttJadLEZyCKy6jG","bibbaseid":"vinay-rawat-larsson-gaur-singh-thermalawaretestschedulingforstackedmultichipmodules-2010","downloads":0,"creationDate":"2016-12-12T17:25:37.710Z","title":"Thermal aware test scheduling for stacked multi-chip-modules","author_short":["Vinay, N. S.","Rawat, I.","Larsson, E.","Gaur, M. S.","Singh, V."],"year":2010,"bibtype":"inproceedings","biburl":"http://dblp.org/pers/tb2/g/Gaur:Manoj_Singh","bibdata":{"bibtype":"inproceedings","type":"inproceedings","author":[{"firstnames":["N.","S."],"propositions":[],"lastnames":["Vinay"],"suffixes":[]},{"firstnames":["Indira"],"propositions":[],"lastnames":["Rawat"],"suffixes":[]},{"firstnames":["Erik"],"propositions":[],"lastnames":["Larsson"],"suffixes":[]},{"firstnames":["Manoj","Singh"],"propositions":[],"lastnames":["Gaur"],"suffixes":[]},{"firstnames":["Virendra"],"propositions":[],"lastnames":["Singh"],"suffixes":[]}],"title":"Thermal aware test scheduling for stacked multi-chip-modules","booktitle":"2010 East-West Design & Test Symposium, EWDTS 2010, St. Petersburg, Russia, September 17-20, 2010","pages":"343–349","year":"2010","crossref":"DBLP:conf/ewdts/2010","url":"https://doi.org/10.1109/EWDTS.2010.5742053","doi":"10.1109/EWDTS.2010.5742053","timestamp":"Thu, 23 Mar 2023 00:00:00 +0100","biburl":"https://dblp.org/rec/conf/ewdts/VinayRLGS10.bib","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@inproceedings{DBLP:conf/ewdts/VinayRLGS10,\n author = {N. S. Vinay and\n Indira Rawat and\n Erik Larsson and\n Manoj Singh Gaur and\n Virendra Singh},\n title = {Thermal aware test scheduling for stacked multi-chip-modules},\n booktitle = {2010 East-West Design {\\&} Test Symposium, {EWDTS} 2010, St. Petersburg,\n Russia, September 17-20, 2010},\n pages = {343--349},\n year = {2010},\n crossref = {DBLP:conf/ewdts/2010},\n url = {https://doi.org/10.1109/EWDTS.2010.5742053},\n doi = {10.1109/EWDTS.2010.5742053},\n timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},\n biburl = {https://dblp.org/rec/conf/ewdts/VinayRLGS10.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Vinay, N. S.","Rawat, I.","Larsson, E.","Gaur, M. S.","Singh, V."],"key":"DBLP:conf/ewdts/VinayRLGS10","id":"DBLP:conf/ewdts/VinayRLGS10","bibbaseid":"vinay-rawat-larsson-gaur-singh-thermalawaretestschedulingforstackedmultichipmodules-2010","role":"author","urls":{"Paper":"https://doi.org/10.1109/EWDTS.2010.5742053"},"metadata":{"authorlinks":{"gaur, m":"https://bibbase.org/dblp/Gaur:Manoj_Singh"}},"downloads":0},"search_terms":["thermal","aware","test","scheduling","stacked","multi","chip","modules","vinay","rawat","larsson","gaur","singh"],"keywords":[],"authorIDs":["28AQmWdz4TfnhaQ2u"],"dataSources":["dvnZAb5DbKvsvGk9M","cXmBHMxXA7EJ6F5qG"]}