{"_id":"yZ6WjhdaMyWgLsvQb","bibbaseid":"viredaz-ienne-mantraiasystolicneurocomputer-1993","author_short":["Viredaz, M. A.","Ienne, P."],"bibdata":{"bibtype":"inproceedings","type":"inproceedings","title":"MANTRA I: a systolic neuro-computer","volume":"3","shorttitle":"MANTRA I","doi":"10.1109/IJCNN.1993.714364","booktitle":"Proceedings of 1993 International Conference on Neural Networks (IJCNN-93-Nagoya, Japan)","author":[{"propositions":[],"lastnames":["Viredaz"],"firstnames":["M.","A."],"suffixes":[]},{"propositions":[],"lastnames":["Ienne"],"firstnames":["P."],"suffixes":[]}],"month":"October","year":"1993","keywords":"Arithmetic, Artificial neural networks, Euclidean distance, GENES IV, Hardware, Heart, MANTRA I machine, Multilayer perceptrons, Neural networks, SIMD neuro-computer, Systolic arrays, VLSI, VLSI custom chip, Very large scale integration, Workstations, data flows, dedicated processing elements, neural chips, neural nets, parallel machines, parallel processing, performance evaluation, square systolic array, systolic arrays","pages":"3054–3057 vol.3","author_short":["Viredaz, M. A.","Ienne, P."],"key":"viredaz_mantra_1993","id":"viredaz_mantra_1993","bibbaseid":"viredaz-ienne-mantraiasystolicneurocomputer-1993","role":"author","urls":{},"keyword":["Arithmetic","Artificial neural networks","Euclidean distance","GENES IV","Hardware","Heart","MANTRA I machine","Multilayer perceptrons","Neural networks","SIMD neuro-computer","Systolic arrays","VLSI","VLSI custom chip","Very large scale integration","Workstations","data flows","dedicated processing elements","neural chips","neural nets","parallel machines","parallel processing","performance evaluation","square systolic array","systolic arrays"],"metadata":{"authorlinks":{}},"html":""},"bibtype":"inproceedings","biburl":"https://bibbase.org/zotero/guptasonal","dataSources":["oirhNxAwKSWu4c3pk"],"keywords":["arithmetic","artificial neural networks","euclidean distance","genes iv","hardware","heart","mantra i machine","multilayer perceptrons","neural networks","simd neuro-computer","systolic arrays","vlsi","vlsi custom chip","very large scale integration","workstations","data flows","dedicated processing elements","neural chips","neural nets","parallel machines","parallel processing","performance evaluation","square systolic array","systolic arrays"],"search_terms":["mantra","systolic","neuro","computer","viredaz","ienne"],"title":"MANTRA I: a systolic neuro-computer","year":1993}