Low Voltage Low Power CMOS Design Techniques for Deep Submicron ICs. Wei, L., Roy, K., & De, V. In VLSI Design, pages 24-29, 2000. IEEE Computer Society.
Low Voltage Low Power CMOS Design Techniques for Deep Submicron ICs. [link]Link  Low Voltage Low Power CMOS Design Techniques for Deep Submicron ICs. [link]Paper  bibtex   
@inproceedings{conf/vlsid/WeiRD00,
  added-at = {2015-04-20T00:00:00.000+0200},
  author = {Wei, Liqiong and Roy, Kaushik and De, Vivek},
  biburl = {http://www.bibsonomy.org/bibtex/205992bb875db1192beb17e13c9b36b63/dblp},
  booktitle = {VLSI Design},
  crossref = {conf/vlsid/2000},
  ee = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2000.812579},
  interhash = {1585040f3a22f35b5bff853ca3fd4283},
  intrahash = {05992bb875db1192beb17e13c9b36b63},
  isbn = {0-7695-0487-6},
  keywords = {dblp},
  pages = {24-29},
  publisher = {IEEE Computer Society},
  timestamp = {2015-06-18T10:51:22.000+0200},
  title = {Low Voltage Low Power CMOS Design Techniques for Deep Submicron ICs.},
  url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2000.html#WeiRD00},
  year = 2000
}

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