Post-silicon calibration of analog CMOS using phase-change memory cells

Post-silicon calibration of analog CMOS using phase-change memory cells. Wen<sup>S</sup>, C., Paramesh, J., Pileggi, L., Li, J., Kim, S., Proesel, J., & Lam, C. In 2011 Proceedings of the ESSCIRC (<strong>ESSCIRC</strong>), pages 423–426, Sept, 2011.
doi bibtex

@INPROCEEDINGS{wen2011esscirc, 
author={ Cheng-Yuan Wen<sup>S</sup> and Jeyanandh Paramesh and Larry Pileggi and Jing Li and SangBum Kim and Jonathan Proesel and Chung Lam}, 
booktitle={2011 Proceedings of the ESSCIRC (<strong>ESSCIRC</strong>)}, 
title={Post-silicon calibration of analog {CMOS} using phase-change memory cells}, 
year={2011}, 
volume={}, 
number={}, 
pages={423--426}, 
keywords={conference, CMOS analogue integrated circuits,antimony compounds,calibration,chalcogenide glasses,comparators (circuits),elemental semiconductors,germanium compounds,phase change memories,redundancy,silicon,tellurium compounds,Ge2Sb2Te5,IBM CMOS technology,PCRAM mushroom cells,Si,analog CMOS,capacitance 4.41 fF,combinatorial redundancy,digital calibration,embedded GST,nonvolatile phase-change random access memory cells,offset-minimized CMOS comparator,post-manufacturing calibration,post-silicon calibration,power 55.42 muW,size 90 nm,switchable resistances,voltage 1 V,Arrays,CMOS integrated circuits,Calibration,Generators,Phase change random access memory,Redundancy,Resistance}, 
doi={10.1109/ESSCIRC.2011.6044997}, 
ISSN={1930-8833}, 
month={Sept},
%note={(Acceptance Rate: <u>38\%</u>, 121 out of 314)},
}

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