@inproceedings{conf/IEEEpact/XiangYMRZ12,
  added-at = {2021-08-11T00:00:00.000+0200},
  author = {Xiang, Ping and Yang, Yi and Mantor, Mike and Rubin, Norm and Zhou, Huiyang},
  biburl = {https://www.bibsonomy.org/bibtex/278b7d1a3b5884449f2257558f4e4cd9a/dblp},
  booktitle = {PACT},
  crossref = {conf/IEEEpact/2012},
  editor = {Yew, Pen-Chung and Cho, Sangyeun and DeRose, Luiz and Lilja, David J.},
  ee = {https://ieeexplore.ieee.org/document/7842968/},
  interhash = {60a7ef9bc2078e50cffabac9bfae52f1},
  intrahash = {78b7d1a3b5884449f2257558f4e4cd9a},
  isbn = {978-1-4503-1182-3},
  keywords = {dblp},
  pages = {449-450},
  publisher = {ACM},
  timestamp = {2024-04-10T06:10:32.000+0200},
  title = {Many-thread aware instruction-level parallelism: architecting shader cores for GPU computing.},
  url = {http://dblp.uni-trier.de/db/conf/IEEEpact/pact2012.html#XiangYMRZ12},
  year = 2012
}

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