A hybrid computing architecture for fault-tolerant deep learning accelerators. Xu, D., Chu, C., Wang, Q., Liu, C., Wang, Y., Zhang, L., Liang, H., & Cheng, K. In 2020 IEEE 38th International Conference on Computer Design (ICCD), pages 478–485, 2020. IEEE. bibtex @inproceedings{xu2020hybrid,
title={A hybrid computing architecture for fault-tolerant deep learning accelerators},
author={Xu, Dawen and Chu, Cheng and Wang, Qianlong and Liu, Cheng and Wang, Ying and Zhang, Lei and Liang, Huaguo and Cheng, Kwang-Ting},
booktitle={2020 IEEE 38th International Conference on Computer Design (ICCD)},
pages={478--485},
year={2020},
organization={IEEE}
}
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