@inproceedings{conf/aca/YangZWLL14,
  author = {Yang, Shenglai and Zhou, Kuanjiu and Wang, Jie and Liu, Bin and Li, Ting},
  booktitle = {ACA},
  crossref = {conf/aca/2014},
  editor = {Wu, Junjie and Chen, Haibo and Wang, Xingwei},
  ee = {http://dx.doi.org/10.1007/978-3-662-44491-7_4},
  interhash = {08da1d876e09e72a6cc27584f2a31fbc},
  intrahash = {982db0566d14fd4229f8fb2c935d5eff},
  isbn = {978-3-662-44490-0},
  pages = {43-57},
  publisher = {Springer},
  series = {Communications in Computer and Information Science},
  title = {A Partition Method of SoC Design Serving the Multi-FPGA Verification Platform.},
  url = {http://dblp.uni-trier.de/db/conf/aca/aca2014.html#YangZWLL14},
  volume = 451,
  year = 2014
}

{"_id":"Gqq8Jos4H4YNWrNdd","bibbaseid":"yang-zhou-wang-liu-li-apartitionmethodofsocdesignservingthemultifpgaverificationplatform-2014","downloads":0,"creationDate":"2017-10-16T16:33:09.443Z","title":"A Partition Method of SoC Design Serving the Multi-FPGA Verification Platform.","author_short":["Yang, S.","Zhou, K.","Wang, J.","Liu, B.","Li, T."],"year":2014,"bibtype":"inproceedings","biburl":"http://www.bibsonomy.org/bib/author/jie wang?items=1000","bibdata":{"bibtype":"inproceedings","type":"inproceedings","author":[{"propositions":[],"lastnames":["Yang"],"firstnames":["Shenglai"],"suffixes":[]},{"propositions":[],"lastnames":["Zhou"],"firstnames":["Kuanjiu"],"suffixes":[]},{"propositions":[],"lastnames":["Wang"],"firstnames":["Jie"],"suffixes":[]},{"propositions":[],"lastnames":["Liu"],"firstnames":["Bin"],"suffixes":[]},{"propositions":[],"lastnames":["Li"],"firstnames":["Ting"],"suffixes":[]}],"booktitle":"ACA","crossref":"conf/aca/2014","editor":[{"propositions":[],"lastnames":["Wu"],"firstnames":["Junjie"],"suffixes":[]},{"propositions":[],"lastnames":["Chen"],"firstnames":["Haibo"],"suffixes":[]},{"propositions":[],"lastnames":["Wang"],"firstnames":["Xingwei"],"suffixes":[]}],"ee":"http://dx.doi.org/10.1007/978-3-662-44491-7_4","interhash":"08da1d876e09e72a6cc27584f2a31fbc","intrahash":"982db0566d14fd4229f8fb2c935d5eff","isbn":"978-3-662-44490-0","pages":"43-57","publisher":"Springer","series":"Communications in Computer and Information Science","title":"A Partition Method of SoC Design Serving the Multi-FPGA Verification Platform.","url":"http://dblp.uni-trier.de/db/conf/aca/aca2014.html#YangZWLL14","volume":"451","year":"2014","bibtex":"@inproceedings{conf/aca/YangZWLL14,\n author = {Yang, Shenglai and Zhou, Kuanjiu and Wang, Jie and Liu, Bin and Li, Ting},\n booktitle = {ACA},\n crossref = {conf/aca/2014},\n editor = {Wu, Junjie and Chen, Haibo and Wang, Xingwei},\n ee = {http://dx.doi.org/10.1007/978-3-662-44491-7_4},\n interhash = {08da1d876e09e72a6cc27584f2a31fbc},\n intrahash = {982db0566d14fd4229f8fb2c935d5eff},\n isbn = {978-3-662-44490-0},\n pages = {43-57},\n publisher = {Springer},\n series = {Communications in Computer and Information Science},\n title = {A Partition Method of SoC Design Serving the Multi-FPGA Verification Platform.},\n url = {http://dblp.uni-trier.de/db/conf/aca/aca2014.html#YangZWLL14},\n volume = 451,\n year = 2014\n}\n\n","author_short":["Yang, S.","Zhou, K.","Wang, J.","Liu, B.","Li, T."],"editor_short":["Wu, J.","Chen, H.","Wang, X."],"key":"conf/aca/YangZWLL14","id":"conf/aca/YangZWLL14","bibbaseid":"yang-zhou-wang-liu-li-apartitionmethodofsocdesignservingthemultifpgaverificationplatform-2014","role":"author","urls":{"Link":"http://dx.doi.org/10.1007/978-3-662-44491-7_4","Paper":"http://dblp.uni-trier.de/db/conf/aca/aca2014.html#YangZWLL14"},"downloads":0},"search_terms":["partition","method","soc","design","serving","multi","fpga","verification","platform","yang","zhou","wang","liu","li"],"keywords":[],"authorIDs":[],"dataSources":["xFjM6NgS6WTTcFJxk"]}