A Partition Method of SoC Design Serving the Multi-FPGA Verification Platform. Yang, S., Zhou, K., Wang, J., Liu, B., & Li, T. In Wu, J., Chen, H., & Wang, X., editors, ACA, volume 451, of Communications in Computer and Information Science, pages 43-57, 2014. Springer.
A Partition Method of SoC Design Serving the Multi-FPGA Verification Platform. [link]Link  A Partition Method of SoC Design Serving the Multi-FPGA Verification Platform. [link]Paper  bibtex   
@inproceedings{conf/aca/YangZWLL14,
  author = {Yang, Shenglai and Zhou, Kuanjiu and Wang, Jie and Liu, Bin and Li, Ting},
  booktitle = {ACA},
  crossref = {conf/aca/2014},
  editor = {Wu, Junjie and Chen, Haibo and Wang, Xingwei},
  ee = {http://dx.doi.org/10.1007/978-3-662-44491-7_4},
  interhash = {08da1d876e09e72a6cc27584f2a31fbc},
  intrahash = {982db0566d14fd4229f8fb2c935d5eff},
  isbn = {978-3-662-44490-0},
  pages = {43-57},
  publisher = {Springer},
  series = {Communications in Computer and Information Science},
  title = {A Partition Method of SoC Design Serving the Multi-FPGA Verification Platform.},
  url = {http://dblp.uni-trier.de/db/conf/aca/aca2014.html#YangZWLL14},
  volume = 451,
  year = 2014
}

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