Effective Contraction of Timed STGs for Decomposition Based Timed Circuit Synthesis

Effective Contraction of Timed STGs for Decomposition Based Timed Circuit Synthesis. Yoneda, T. & Myers, C. J. In Automated Technology for Verification and Analysis, 4th International Symposium, ATVA 2006, Beijing, China, October 23-26, 2006, pages 229–244, 2006.

Paper doi bibtex

@inproceedings{DBLP:conf/atva/YonedaM06,
  author    = {Tomohiro Yoneda and
               Chris J. Myers},
  title     = {Effective Contraction of Timed STGs for Decomposition Based Timed
               Circuit Synthesis},
  booktitle = {Automated Technology for Verification and Analysis, 4th International
               Symposium, {ATVA} 2006, Beijing, China, October 23-26, 2006},
  pages     = {229--244},
  year      = {2006},
  crossref  = {DBLP:conf/atva/2006},
  url       = {https://doi.org/10.1007/11901914\_19},
  doi       = {10.1007/11901914\_19},
  timestamp = {Tue, 14 May 2019 10:00:49 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/atva/YonedaM06},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

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