{"_id":"H2prZoMNtRGXSD6L7","bibbaseid":"yu-ciesielski-formalanalysisofgaloisfieldarithmeticcircuitsparallelverificationandreverseengineering-2019","authorIDs":["5ce6fb5226c0fcda0100030c","5dcdc5f178619fde010000b3"],"author_short":["Yu, C.","Ciesielski, M. J."],"bibdata":{"bibtype":"article","type":"article","author":[{"firstnames":["Cunxi"],"propositions":[],"lastnames":["Yu"],"suffixes":[]},{"firstnames":["Maciej","J."],"propositions":[],"lastnames":["Ciesielski"],"suffixes":[]}],"title":"Formal Analysis of Galois Field Arithmetic Circuits-Parallel Verification and Reverse Engineering","journal":"IEEE Trans. on CAD of Integrated Circuits and Systems","volume":"38","number":"2","pages":"354–365","year":"2019","url":"https://doi.org/10.1109/TCAD.2018.2808457","doi":"10.1109/TCAD.2018.2808457","timestamp":"Wed, 13 Feb 2019 00:00:00 +0100","biburl":"https://dblp.org/rec/bib/journals/tcad/YuC19","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@article{DBLP:journals/tcad/YuC19,\n author = {Cunxi Yu and\n Maciej J. Ciesielski},\n title = {Formal Analysis of Galois Field Arithmetic Circuits-Parallel Verification\n and Reverse Engineering},\n journal = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},\n volume = {38},\n number = {2},\n pages = {354--365},\n year = {2019},\n url = {https://doi.org/10.1109/TCAD.2018.2808457},\n doi = {10.1109/TCAD.2018.2808457},\n timestamp = {Wed, 13 Feb 2019 00:00:00 +0100},\n biburl = {https://dblp.org/rec/bib/journals/tcad/YuC19},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Yu, C.","Ciesielski, M. J."],"key":"DBLP:journals/tcad/YuC19","id":"DBLP:journals/tcad/YuC19","bibbaseid":"yu-ciesielski-formalanalysisofgaloisfieldarithmeticcircuitsparallelverificationandreverseengineering-2019","role":"author","urls":{"Paper":"https://doi.org/10.1109/TCAD.2018.2808457"},"downloads":0,"html":""},"bibtype":"article","biburl":"https://ycunxi.github.io/utah-csl/bibtex/all.bib","creationDate":"2019-05-23T19:58:10.186Z","downloads":0,"keywords":["dblp"],"search_terms":["formal","analysis","galois","field","arithmetic","circuits","parallel","verification","reverse","engineering","yu","ciesielski"],"title":"Formal Analysis of Galois Field Arithmetic Circuits-Parallel Verification and Reverse Engineering","year":2019,"dataSources":["L6BLFSB28hKk5Nt67"]}