A Resource-Optimized VLSI Architecture for Patient-Specific Seizure Detection using Frontal-Lobe EEG

A Resource-Optimized VLSI Architecture for Patient-Specific Seizure Detection using Frontal-Lobe EEG. Zhan, T., Guraya, S., & Kassiri, H. In IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019, pages 1–5, 2019. IEEE.

Paper doi bibtex

@inproceedings{DBLP:conf/iscas/ZhanGK19,
  author       = {Tianyu Zhan and
                  Sam Guraya and
                  Hossein Kassiri},
  title        = {A Resource-Optimized {VLSI} Architecture for Patient-Specific Seizure
                  Detection using Frontal-Lobe {EEG}},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2019,
                  Sapporo, Japan, May 26-29, 2019},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ISCAS.2019.8702211},
  doi          = {10.1109/ISCAS.2019.8702211},
  timestamp    = {Sun, 14 Jul 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ZhanGK19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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