@Article{rashi2023tallip,
  author   = {Piyush Jha and Rashi Kumar and Vineet Sahula},
  journal  = {ACM Transactions on Asian and Low-Resource Language Information Processing},
  title    = {Filtering and Extended Vocabulary based Translation for Low-resource Language pair of Sanskrit-Hindi},
  year     = {2023},
  issn     = {2375-4699},
  pages    = {14},
  volume   = {just accpeted},
  doi      = {https://doi.org/10.1145/3580495},
  keywords = {Zero-shot, Filtering, Extended Vocabulary, Sanskrit, Hindi, Low resource, Neural MachineTranslation, Transformers},
  url      = {https://dl.acm.org/doi/10.1145/3580495},
}

@Article{soma2022esl,
  author  = {Soma Niloy Ghosh and Vineet Sahula and Lava Bhargava},
  journal = {IEEE Embedded Systems Letters},
  title   = {Enhanced Multi-Core Performance Using Novel Thread Aware Cache Coherence and Prefetch-Control Mechanism},
  year    = {2022},
  doi     = {https://doi.org/10.1109/LES.2022.3187418},
  url     = {https://ieeexplore.ieee.org/iel7/4563995/5170179/09811525.pdf},
}

@Article{saini2021novel,
  author   = {Saini, Sandeep and Sahula, Vineet},
  journal  = {IET jurnal of Cognitive Computation and Systems},
  title    = {A novel model based on Sequential Adaptive Memory for English–Hindi Translation},
  year     = {2021},
  number   = {2},
  pages    = {142-153},
  volume   = {3},
  abstract = {Abstract Machine-based language translation has been certainly picking up. Still, machines lag behind the cognitive powers of human beings. Neural Machine Translation (NMT) methods require huge datasets and computational power for high-quality translation. A novel Sequential Adaptive Memory (SAM) cognitive model-based machine translation system for English to Hindi translation, was proposed. This model is an augmented version of the Cortical Learning Algorithm (CLA). The SAM is based on the architecture of the neocortex region of the brain, where speech and language comprehension and production take place. The proposed model is capable of learning with smaller datasets. This model employs the sequence to sequence learning approach, which provides better quality translation. It enables the creation of word pairs, dictionaries, and rules for translation. The results of the proposed approach are compared with the traditional phrase-based SMT approach as well as with the state-of-the-art NMT approach. The results are comparable with the results of the conventional approaches. We illustrate that the limitations of the approaches are won over by the proposed SAM approach. It is observed that SAM is capable of exhibiting satisfactory quality translation for low resource languages as well.},
  doi      = {https://doi.org/10.1049/ccs2.12011},
  eprint   = {https://ietresearch.onlinelibrary.wiley.com/doi/pdf/10.1049/ccs2.12011},
  url      = {https://ietresearch.onlinelibrary.wiley.com/doi/abs/10.1049/ccs2.12011},
}

Abstract Machine-based language translation has been certainly picking up. Still, machines lag behind the cognitive powers of human beings. Neural Machine Translation (NMT) methods require huge datasets and computational power for high-quality translation. A novel Sequential Adaptive Memory (SAM) cognitive model-based machine translation system for English to Hindi translation, was proposed. This model is an augmented version of the Cortical Learning Algorithm (CLA). The SAM is based on the architecture of the neocortex region of the brain, where speech and language comprehension and production take place. The proposed model is capable of learning with smaller datasets. This model employs the sequence to sequence learning approach, which provides better quality translation. It enables the creation of word pairs, dictionaries, and rules for translation. The results of the proposed approach are compared with the traditional phrase-based SMT approach as well as with the state-of-the-art NMT approach. The results are comparable with the results of the conventional approaches. We illustrate that the limitations of the approaches are won over by the proposed SAM approach. It is observed that SAM is capable of exhibiting satisfactory quality translation for low resource languages as well.

@Article{Ghosh2021,
  author   = {Soma N. Ghosh and and Vineet Sahula and Lava Bhargava},
  journal  = {Springer's JournalDesign Automation for Embedded Systems},
  title    = {SRCP: sharing and reuse-aware replacement policy for the partitioned cache in multicore system},
  year     = {2021},
  pages    = {1-19},
  abstract = {Although multi-core processors enhance the performance yet the challenge of estimating Worst-Case Execution Time (WCET) of a task remains in such systems due to interference in shared resources like Last Level Caches (LLC). Cache partitioning has been used to reduce the interference problem by isolating the shared cache among each thread to ease the WCET estimation. However, it prevents information shared among parallel threads running in different cores. In current work, we propose sharing and reuse aware partitioned cache (SRCP) framework such that replication of shared information, data, or instruction, in different partitions could be avoided in LLC. Further, enhancement in existing cache replacement policy is proposed, which avoids eviction of cache blocks shared among multiple cores accessing partitioned last level cache. Tighter WCET, as well as improved resource utilization, is thereby ensured with the proposed framework. Experimental results show that SRCP shows significant improvement in cache hit-rate for PARSEC and SPLASH2 benchmarks as compared to least recently used cache replacement policy and outperforms EHC and TA-DRRIP, which are state-of-the-art replacement policies.},
  doi      = {10.1007/s10617-021-09251-z},
  url      = {https://link.springer.com/article/10.1007/s10617-021-09251-z},
}

Although multi-core processors enhance the performance yet the challenge of estimating Worst-Case Execution Time (WCET) of a task remains in such systems due to interference in shared resources like Last Level Caches (LLC). Cache partitioning has been used to reduce the interference problem by isolating the shared cache among each thread to ease the WCET estimation. However, it prevents information shared among parallel threads running in different cores. In current work, we propose sharing and reuse aware partitioned cache (SRCP) framework such that replication of shared information, data, or instruction, in different partitions could be avoided in LLC. Further, enhancement in existing cache replacement policy is proposed, which avoids eviction of cache blocks shared among multiple cores accessing partitioned last level cache. Tighter WCET, as well as improved resource utilization, is thereby ensured with the proposed framework. Experimental results show that SRCP shows significant improvement in cache hit-rate for PARSEC and SPLASH2 benchmarks as compared to least recently used cache replacement policy and outperforms EHC and TA-DRRIP, which are state-of-the-art replacement policies.

@Article{saini2020ccs,
  author   = {S. {Saini} and V. {Sahula}},
  doi      = {10.1049/ccs.2019.0017},
  journal  = {IET Cognitive Computation and Systems},
  number   = {1},
  title    = {Cognitive architecture for natural language comprehension},
  url      = {https://ieeexplore.ieee.org/document/9037560},
  volume   = {2},
  year     = {2020},
  issn     = {2517-7567},
  pages    = {23-31},
  abstract = {Human interactions with computers in natural language have always been a challenging task. Numerous computational systems are being designed to bring this interaction as close to the natural language commands as possible. Cognitive architectures are worthy solutions to solve this problem. In the present work, the authors have developed a cognitive architecture, which is capable of learning using natural language input. It can learn with minimal input data and has been designed using neural networks. The system is inspired by conventional cognitive models for working memory. They have proposed the system with a central executive unit controlling the short-term memory and long-term memory to comprehend the text input given as a natural language command and generate the output in natural language. The system comprises a feedback system as well to improve the learning process. The model has been trained using 1000 English sentences taught to primary school students. The system is capable of comprehending the relations between words, verbs, nouns, pronouns, adjectives, and generates logical reasoning-based answers.},
  file     = {:https\://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9037560:},
  keywords = {neural nets;natural language processing;computer aided instruction;natural languages;cognition;learning (artificial intelligence);cognitive systems;inference mechanisms;cognitive architecture;natural language comprehension;human interactions;numerous computational systems;natural language input;minimal input data;conventional cognitive models;working memory;short-term memory;long-term memory;natural language command;feedback system},
}

Human interactions with computers in natural language have always been a challenging task. Numerous computational systems are being designed to bring this interaction as close to the natural language commands as possible. Cognitive architectures are worthy solutions to solve this problem. In the present work, the authors have developed a cognitive architecture, which is capable of learning using natural language input. It can learn with minimal input data and has been designed using neural networks. The system is inspired by conventional cognitive models for working memory. They have proposed the system with a central executive unit controlling the short-term memory and long-term memory to comprehend the text input given as a natural language command and generate the output in natural language. The system comprises a feedback system as well to improve the learning process. The model has been trained using 1000 English sentences taught to primary school students. The system is capable of comprehending the relations between words, verbs, nouns, pronouns, adjectives, and generates logical reasoning-based answers.

@InCollection{saini2020setting,
  author    = {Saini, Sandeep and Sahula, Vineet},
  booktitle = {Cognitive Informatics, Computer Modelling, and Cognitive Science, Vol. 1 (Theory, Case Studies, and Applications)},
  publisher = {Academic Press, Elsevier},
  title     = {Setting up a neural machine translation system for English to Indian languages},
  year      = {2020},
  isbn      = {978-0-12-819443-0},
  pages     = {195--212},
  doi       = {https://doi.org/10.1016/B978-0-12-819443-0.00011-8},
  url       = {https://www.sciencedirect.com/science/article/pii/B9780128194430000118},
}

@InCollection{saini2020language,
  author    = {Saini, Sandeep and Sahula, Vineet},
  booktitle = {Cognitive Informatics, Computer Modelling, and Cognitive Science, Vol. 2 (Application to Neural Engineering, Robotics, and STEM)},
  publisher = {Academic Press, Elsevier},
  title     = {Language learnability analysis of Hindi: a comparison with ideal and constrained learning approaches},
  year      = {2020},
  isbn      = {978-0-12-819445-4},
  pages     = {273--290},
  doi       = {https://doi.org/10.1016/B978-0-12-819445-4.00014-X},
  url       = {https://www.sciencedirect.com/science/article/pii/B978012819445400014X},
}

@Article{lintu2018jos,
  author   = {L. Rajan and C. Periasamy and V. Sahula},
  doi      = {10.1109/JSEN.2019.2893025},
  journal  = {IEEE Sensors Journal},
  number   = {9},
  title    = {An In-Depth Study on Electrical and Hydrogen Sensing Characteristics of {ZnO} Thin Film with Radio Frequency Sputtered Gold Schottky Contacts},
  url      = {https://ieeexplore.ieee.org/document/8616789},
  volume   = {19},
  year     = {2019},
  issn     = {1530-437X},
  month    = may,
  pages    = {1-1},
  abstract = {Electrical and hydrogen sensing characteristics of radio frequency sputtered Au/ZnO thin film Schottky diodes on n-silicon substrate have been investigated over a wide temperature range. Current-voltage characterizations of the device in the temperature range of 25°C to 200°C confirm its excellent rectifying property with forward to reverse current ratio of 1610 at an external bias of 5 V. Ideality factor in the range of 4.12 to 2.98 is obtained for Au/ZnO Schottky diode in the aforementioned temperature range, at atmospheric conditions. On exposing diode to hydrogen, a reduction in ideality factor is observed which makes thermionic emission more prominent. The proposed device has proven to be hydrogen sensitive, on account of the lateral shift observed in I –V characteristics at different hydrogen concentrations (50 ppm-1000 ppm). Maximum barrier height variation of 99 meV and sensitivity of 144% have been observed at 1000 ppm hydrogen at 200°C. A Detailed perusal of the steady-state reaction kinetics of the sensor using I – V characteristics affirmed that the atomistic hydrogen adsorption at Au/ZnO interface is accountable for the barrier height modulation. The studied sensor depicts remarkable performance for high-temperature detection.},
  keywords = {Schottky diodes;Zinc oxide;Sensors;II-VI semiconductor materials;Hydrogen;Temperature;Gold;Electrical characteristics;Hydrogen sensing;Metal-semiconductor interface Palladium catalyst;Schottky diode;Zinc oxide (ZnO) thin film},
}

Electrical and hydrogen sensing characteristics of radio frequency sputtered Au/ZnO thin film Schottky diodes on n-silicon substrate have been investigated over a wide temperature range. Current-voltage characterizations of the device in the temperature range of 25°C to 200°C confirm its excellent rectifying property with forward to reverse current ratio of 1610 at an external bias of 5 V. Ideality factor in the range of 4.12 to 2.98 is obtained for Au/ZnO Schottky diode in the aforementioned temperature range, at atmospheric conditions. On exposing diode to hydrogen, a reduction in ideality factor is observed which makes thermionic emission more prominent. The proposed device has proven to be hydrogen sensitive, on account of the lateral shift observed in I –V characteristics at different hydrogen concentrations (50 ppm-1000 ppm). Maximum barrier height variation of 99 meV and sensitivity of 144% have been observed at 1000 ppm hydrogen at 200°C. A Detailed perusal of the steady-state reaction kinetics of the sensor using I – V characteristics affirmed that the atomistic hydrogen adsorption at Au/ZnO interface is accountable for the barrier height modulation. The studied sensor depicts remarkable performance for high-temperature detection.

@Article{tarun2018tijr,
  author    = {Tarun Kumar Goyal and Vineet Sahula and Deepak Kumawat},
  journal   = {IETE Journal of Research},
  title     = {Energy Efficient Lightweight Cryptography Algorithms for IoT Devices},
  year      = {2019},
  doi       = {10.1080/03772063.2019.1670103},
  issn      = {0974-780X},
  number    = {0},
  pages     = {1-14},
  url       = {https://doi.org/10.1080/03772063.2019.1670103},
  volume    = {0},
  abstract  = {Over few decades, people have been working on providing security solutions, whereas attackers too have been working simultaneously. We present an evaluation of security algorithms, comparing performances and robustness. These comparisons are performed after hardware implementation and use crypt analysis. The targeted devices are wrist watches, RFID tags, IoT devices and others, which don't have a lot of areas (millions of gate equivalent). While performing this, the primary concern has been exploration of an algorithm that can work in these constrained limits. This led to a search for an algorithm that has low hardware footprints, low power consumption and better speed but at the same time implements adequate security. PRESENT has been found to be one such suitable algorithm. It has been also included in the new international standard for light-weight cryptographic methods under ISO/IEC 29192-2:2012 for its straight forward and light design. Our paper reports hardware implementation results of PRESENT, AES, ECDH, DH and RSA cryptography algorithms. We have implemented these algorithms with standard gate library of UMC-90 nm. Each algorithm has its own architecture and hence requires different crypt-analysis techniques like brute force, Pollard's Rho and biclique for “difficulty to break” measurement. It is a measure in term of time and data complexity of efforts required of a cryptographic attack. We have obtained 1.7× improvement in area and 63× improvement in power for modified PRESENT algorithm as compared to AES. It has also been observed that the proposed PRESENT algorithm has a time complexity of break attack as 2127 for 128 bit key length.},
  eprint    = {https://doi.org/10.1080/03772063.2019.1670103},
  publisher = {Taylor & Francis},
}

Over few decades, people have been working on providing security solutions, whereas attackers too have been working simultaneously. We present an evaluation of security algorithms, comparing performances and robustness. These comparisons are performed after hardware implementation and use crypt analysis. The targeted devices are wrist watches, RFID tags, IoT devices and others, which don't have a lot of areas (millions of gate equivalent). While performing this, the primary concern has been exploration of an algorithm that can work in these constrained limits. This led to a search for an algorithm that has low hardware footprints, low power consumption and better speed but at the same time implements adequate security. PRESENT has been found to be one such suitable algorithm. It has been also included in the new international standard for light-weight cryptographic methods under ISO/IEC 29192-2:2012 for its straight forward and light design. Our paper reports hardware implementation results of PRESENT, AES, ECDH, DH and RSA cryptography algorithms. We have implemented these algorithms with standard gate library of UMC-90 nm. Each algorithm has its own architecture and hence requires different crypt-analysis techniques like brute force, Pollard's Rho and biclique for “difficulty to break” measurement. It is a measure in term of time and data complexity of efforts required of a cryptographic attack. We have obtained 1.7× improvement in area and 63× improvement in power for modified PRESENT algorithm as compared to AES. It has also been observed that the proposed PRESENT algorithm has a time complexity of break attack as 2127 for 128 bit key length.

@Article{saini2018jopr,
  author  = {Sandeep Saini and Vineet Sahula},
  doi     = {10.1007/s10936-019-09641-2},
  journal = {Springner's Journal of Psycholinguistic Research},
  title   = {Language Learnability Analysis of Hindi: A Comparison with Ideal and Constrained Learning Approaches},
  url     = {https://link.springer.com/article/10.1007/s10936-019-09641-2},
  year    = {2019},
  issn    = {1573-6555},
  pages   = {947–960},
  vol     = {48},
}

@Article{arjun2019jetta,
  author  = {Arjun Singh Chauhan and Vineet Sahula and A. S. Mandal},
  doi     = {10.1007/s10836-019-05829-5},
  journal = {Springer's Journal of Electronic Testing: Theory and Applications},
  number  = {5},
  title   = {Novel Randomized Placement For FPGA Based Robust ROPUF with Improved Uniqueness},
  url     = {https://link.springer.com/journal/10836},
  volume  = {35},
  year    = {2019},
  issn    = {1573-0727},
  month   = oct,
}

@Article{lintu2017jos,
  author    = {Lintu Rajan and Periasamy Chinnamuthan and Vijayakumar Krishnasamy and Vineet Sahula},
  doi       = {10.1109/JSEN.2016.2620185},
  journal   = {IEEE Sensors Journal},
  number    = {1},
  title     = {An Investigation on Electrical and Hydrogen Sensing Characteristics of RF Sputtered ZnO Thin-Film With Palladium Schottky Contacts},
  url       = {https://ieeexplore.ieee.org/document/7605408},
  volume    = {17},
  year      = {2017},
  issn      = {1530-437X},
  month     = {Jan},
  pages     = {14-21},
  abstract  = {Fabrication and characterizations of a hydrogen sensor with palladium Schottky contacts, grown on radio frequency sputtered zinc oxide thin film is reported. Temperature dependence performance analysis of the proposed sensor was carried out at different hydrogen concentrations (50-1000 ppm) and temperatures (25 C-200 C) using current-voltage (I-V) measurements. Lateral shifts have been observed in the Schottky diode I-V characteristic when the device was exposed to hydrogen, and this could be attributed to the reduction of Schottky barrier height (SBH). The optimum performance of the sensor was obtained at 150 C with maximum SBH variation of 144 meV at 1000 ppm hydrogen. Transient sensor performance at optimum temperature has also been analyzed and sensitivities ranging from 224\% to 1125\% with a minimum response time of 55 s and a recovery time of 26 s have been obtained. The response of sensor toward methane and nitrogen dioxide is also discussed. The basic I-V and capacitance-voltage characteristics of Pd/ZnO thin film are also reported, which confirmed its excellent rectifying properties. The basic microstructure studies of ZnO thin film were also investigated using X-ray diffraction, scanning electron microscope, atomic force microscopy, energy dispersive X-ray spectroscopy, and photoluminescence measurements. The proposed sensor has proven to be economical, due to its high sensitivity and easy to fabricate structure with a limited number of processing steps.},
  keywords  = {II-VI semiconductors;Schottky barriers;Schottky diodes;X-ray chemical analysis;X-ray diffraction;atomic force microscopy;gas sensors;hydrogen;palladium;photoluminescence;scanning electron microscopy;sputtered coatings;wide band gap semiconductors;zinc compounds;H2;I-V characteristic;Pd-ZnO;RF sputtered thin-film;Schottky barrier height;Schottky diode;X-ray diffraction;atomic force microscopy;current-voltage measurements;electrical sensing characteristics;energy dispersive X-ray spectroscopy;hydrogen sensing characteristics;palladium Schottky contacts;photoluminescence;rectifying properties;scanning electron microscope;temperature 25 degC to 200 degC;temperature dependence performance analysis;Hydrogen;II-VI semiconductor materials;Schottky diodes;Sensor phenomena and characterization;Temperature sensors;Zinc oxide;Electrical characteristics;Schottky diode;hydrogen sensing;metal-semiconductor interface palladium catalyst;zinc oxide (ZnO) thin film},
  owner     = {Vineet},
  timestamp = {2017.10.14},
}

Fabrication and characterizations of a hydrogen sensor with palladium Schottky contacts, grown on radio frequency sputtered zinc oxide thin film is reported. Temperature dependence performance analysis of the proposed sensor was carried out at different hydrogen concentrations (50-1000 ppm) and temperatures (25 C-200 C) using current-voltage (I-V) measurements. Lateral shifts have been observed in the Schottky diode I-V characteristic when the device was exposed to hydrogen, and this could be attributed to the reduction of Schottky barrier height (SBH). The optimum performance of the sensor was obtained at 150 C with maximum SBH variation of 144 meV at 1000 ppm hydrogen. Transient sensor performance at optimum temperature has also been analyzed and sensitivities ranging from 224% to 1125% with a minimum response time of 55 s and a recovery time of 26 s have been obtained. The response of sensor toward methane and nitrogen dioxide is also discussed. The basic I-V and capacitance-voltage characteristics of Pd/ZnO thin film are also reported, which confirmed its excellent rectifying properties. The basic microstructure studies of ZnO thin film were also investigated using X-ray diffraction, scanning electron microscope, atomic force microscopy, energy dispersive X-ray spectroscopy, and photoluminescence measurements. The proposed sensor has proven to be economical, due to its high sensitivity and easy to fabricate structure with a limited number of processing steps.

@Article{lintu2016tnano,
  author   = {Lintu Rajan and Periasamy Chinnamuthan and Vineet Sahula},
  title    = {Comprehensive Study on Electrical and Hydrogen Gas Sensing Characteristics of Pt/ZnO Nanocrystalline Thin Film-Based Schottky Diodes Grown on n-Si Substrate Using RF Sputtering},
  journal  = {IEEE Transactions on Nanotechnology},
  year     = {2016},
  volume   = {15},
  number   = {2},
  pages    = {201-208},
  month    = {March},
  issn     = {1536-125X},
  doi      = {10.1109/TNANO.2015.2513102},
  url      = {http://ieeexplore.ieee.org/document/7370798/},
  abstract = {This paper presents a comprehensive study on the electrical characteristics of Pt/ZnO thin film Schottky contacts fabricated on n-Si substrates by RF sputtering, and its application as a Hydrogen sensor. The basic structural, surface morphological, and optical properties of the ZnO thin film were also been explored. Pt/ZnO thin film junction was characterized using current-voltage (I-V) and capacitance-voltage (C-V) measurements at room temperature, exhibiting rectifying behavior with barrier height, ideality factor and series resistance of 0.71 eV (I-V) /0.996 eV(C-V), 2.5 and ~95 ? respectively. The lack of congruence between the values of Schottky barrier heights calculated from I-V and C-V measurements is interpreted. Cheung's method and modified Norde's functions were employed along with the conventional thermionic emission model, to incorporate the impact of series resistance in the calculation of diode parameters. We unveiled, the Hydrogen sensing characteristics displayed by the Pt/ZnO thin film-based sensor to different concentrations (200-1000 ppm) of Hydrogen at 350 C. The sensor has exhibited good recoverable transient characteristics under a series of Hydrogen exposure cycles with a maximum sensitivity of 57% at 1000 ppm of Hydrogen.},
  keywords = {II-VI semiconductors;Schottky diodes;gas sensors;nanofabrication;nanostructured materials;platinum;rectification;semiconductor thin films;sputter deposition;zinc compounds;Pt-ZnO;RF sputtering;Schottky barrier height;Schottky contacts;Schottky diodes;capacitance-voltage measurements;current-voltage measurements;hydrogen gas sensing;ideality factor;nanocrystalline thin film;rectifying behavior;series resistance;thermionic emission model;Hydrogen;II-VI semiconductor materials;Schottky barriers;Schottky diodes;Sensors;Substrates;Zinc oxide;Electrical characteristics;hydrogen sensing;metal-semiconductor interface;schottky diode;zinc oxide (ZnO) thin film},
}

This paper presents a comprehensive study on the electrical characteristics of Pt/ZnO thin film Schottky contacts fabricated on n-Si substrates by RF sputtering, and its application as a Hydrogen sensor. The basic structural, surface morphological, and optical properties of the ZnO thin film were also been explored. Pt/ZnO thin film junction was characterized using current-voltage (I-V) and capacitance-voltage (C-V) measurements at room temperature, exhibiting rectifying behavior with barrier height, ideality factor and series resistance of 0.71 eV (I-V) /0.996 eV(C-V), 2.5 and  95 ? respectively. The lack of congruence between the values of Schottky barrier heights calculated from I-V and C-V measurements is interpreted. Cheung's method and modified Norde's functions were employed along with the conventional thermionic emission model, to incorporate the impact of series resistance in the calculation of diode parameters. We unveiled, the Hydrogen sensing characteristics displayed by the Pt/ZnO thin film-based sensor to different concentrations (200-1000 ppm) of Hydrogen at 350 C. The sensor has exhibited good recoverable transient characteristics under a series of Hydrogen exposure cycles with a maximum sensitivity of 57% at 1000 ppm of Hydrogen.

@Article{lokesh2016tcas2,
  author   = {Lokesh Garg and Vineet Sahula},
  title    = {Macromodels for Static Virtual Ground Voltage Estimation in Power-Gated Circuits},
  journal  = {IEEE Transactions on Circuits and Systems II: Express Briefs},
  year     = {2016},
  volume   = {63},
  number   = {5},
  pages    = {468-472},
  month    = {05},
  issn     = {1549-7747},
  doi      = {10.1109/TCSII.2015.2504270},
  url      = {http://ieeexplore.ieee.org/document/7339471/},
  abstract = {Static virtual ground voltage (Vgnd) is an important parameter to be accurately and efficiently estimated for fine-grained power gating in logic circuits. Previous work results in a large error in Vgnd estimation due to conservative leakage models and inaccurate assumption of voltage conditions at the input of CMOS gates in power-gated circuits. To overcome these problems, we propose support vector machine (SVM)-based macromodels to estimate the leakage current of CMOS gates and thus achieve effective reduction in error in leakage model characterization. These models are then used in SVM classifier (SVC) and regressor to formulate an SVM regression-based Vgnd model. The SVC results in 3 times savings in data generation time compared with HSPICE simulation to develop the final Vgnd model. The proposed model results in <; 1% error and 23 000 times the speedup than HSPICE for the largest benchmark circuit.},
  keywords = {CMOS logic circuits;logic circuits;low-power electronics;regression analysis;support vector machines;CMOS gates;HSPICE simulation;SVC;SVM based macromodels;SVM classifier;SVM regression;Vgnd estimation;fine grained power gating;leakage model characterization;logic circuits;power gated circuits;static virtual ground voltage estimation macromodels;support vector machine based macromodels;CMOS integrated circuits;Integrated circuit modeling;Logic circuits;Logic gates;Semiconductor device modeling;Support vector machines;Transistors;Complimentary metal???oxide???semiconductor (CMOS) gates;Leakage current;Power gating;Support Vector Machine (SVM);leakage current;power gating;support vector machine (SVM);transistor stacks;virtual ground},
  owner    = {vinee},
}

Static virtual ground voltage (Vgnd) is an important parameter to be accurately and efficiently estimated for fine-grained power gating in logic circuits. Previous work results in a large error in Vgnd estimation due to conservative leakage models and inaccurate assumption of voltage conditions at the input of CMOS gates in power-gated circuits. To overcome these problems, we propose support vector machine (SVM)-based macromodels to estimate the leakage current of CMOS gates and thus achieve effective reduction in error in leakage model characterization. These models are then used in SVM classifier (SVC) and regressor to formulate an SVM regression-based Vgnd model. The SVC results in 3 times savings in data generation time compared with HSPICE simulation to develop the final Vgnd model. The proposed model results in <; 1% error and 23 000 times the speedup than HSPICE for the largest benchmark circuit.

@Article{prasad2016influence,
  author    = {Prasad, Mahanth and Sahula, Vineet and Khanna, Vinod Kumar},
  title     = {Influence of Temperature on the Sensitivity of ZnO-Based MEMS Acoustic Sensor},
  journal   = {Sensor Letters},
  year      = {2016},
  volume    = {14},
  number    = {2},
  pages     = {122--126},
  doi       = {10.1166/sl.2016.3603},
  url       = {http://www.ingentaconnect.com/content/asp/senlet/2016/00000014/00000002/art00003},
  abstract  = {This study investigates the temperature dependence of the sensitivity of ZnO-based MEMS acoustic sensor. The structure contains a capacitor using ZnO dielectric layer, on a 25 ?m-thick silicon diaphragm. One micron-thick Al was used as top and bottom electrodes for the fabrication of capacitor. The value of dielectric constant of ZnO layer was found to be 12.5 by measuring the capacitance value at room temperature and 1 kHz frequency. The investigations showed that the value of dielectric constant of ZnO layer increases with temperature. A variation of 11 to 16.2 was observed in dielectric constant on changing the temperature of the device from 25 C to 120 C. The corresponding dielectric loss (tan ?) also increased from 0.03 to 0.1. This variation of capacitance and the corresponding loss affects the sensitivity of the device, which was found to decrease from 432 ?V/Pa at 25 C to 290 ?V/Pa at 120 C.},
  keywords  = {BULK MICROMACHINING; DIELECTRIC CONSTANT; MEMS ACOUSTIC SENSOR; TEMPERATURE; ZnO},
  publisher = {American Scientific Publishers},
}

This study investigates the temperature dependence of the sensitivity of ZnO-based MEMS acoustic sensor. The structure contains a capacitor using ZnO dielectric layer, on a 25 ?m-thick silicon diaphragm. One micron-thick Al was used as top and bottom electrodes for the fabrication of capacitor. The value of dielectric constant of ZnO layer was found to be 12.5 by measuring the capacitance value at room temperature and 1 kHz frequency. The investigations showed that the value of dielectric constant of ZnO layer increases with temperature. A variation of 11 to 16.2 was observed in dielectric constant on changing the temperature of the device from 25 C to 120 C. The corresponding dielectric loss (tan ?) also increased from 0.03 to 0.1. This variation of capacitance and the corresponding loss affects the sensitivity of the device, which was found to decrease from 432 ?V/Pa at 25 C to 290 ?V/Pa at 120 C.

@Manual{JabRef,
  title  = {JabRef},
  author = {{JabRef Development Team}},
  year   = {2016},
  url    = {https://www.jabref.org},
}

@Article{rajan2016electrical,
  author   = {Lintu Rajan and C. Periasamy and Vineet Sahula},
  doi      = {10.1016/j.pisc.2016.03.011},
  journal  = {Elsevier's Perspectives in Science},
  title    = {Electrical characterization of {Au/ZnO} thin film Schottky diode on silicon substrate},
  url      = {http://www.sciencedirect.com/science/article/pii/S2213020916300118},
  volume   = {8},
  year     = {2016},
  issn     = {2213-0209},
  note     = {Recent Trends in Engineering and Material Sciences},
  pages    = {66 - 68},
  abstract = {Summary
An array of Gold (Au) schottky contacts have been deposited on RF Sputtered nanocrystalline Zinc Oxide thin film. A systematic analysis on the electrical parameters of the Schottky diode with the help of current voltage (I-V) and capacitance-voltage (C-V) measurements has been done, which confirmed its excellent rectifying characteristics. To incorporate the influence of series resistance in the determination of Schottky diode parameters (barrier height, ideality factor and saturation current), Cheung's method along with thermionic emission model has also used. The discrepancy in the value of barrier height determined from C-V characteristics throws light into the presence of interface states.},
  keywords = {Zinc oxide, Gold, Thin film, Schottky diode, Electrical characterization},
}

Summary An array of Gold (Au) schottky contacts have been deposited on RF Sputtered nanocrystalline Zinc Oxide thin film. A systematic analysis on the electrical parameters of the Schottky diode with the help of current voltage (I-V) and capacitance-voltage (C-V) measurements has been done, which confirmed its excellent rectifying characteristics. To incorporate the influence of series resistance in the determination of Schottky diode parameters (barrier height, ideality factor and saturation current), Cheung's method along with thermionic emission model has also used. The discrepancy in the value of barrier height determined from C-V characteristics throws light into the presence of interface states.

@Article{renu2015cdt,
  author   = {Renu Kumawat and Vineet Sahula and Manoj Singh Gaur},
  title    = {Probabilistic model for nanocell reliability evaluation in presence of transient errors},
  journal  = {IET Computers Digital Techniques},
  year     = {2015},
  volume   = {9},
  number   = {4},
  pages    = {213-220},
  issn     = {1751-8601},
  doi      = {10.1049/iet-cdt.2014.0124},
  url      = {http://ieeexplore.ieee.org/document/7127186/},
  abstract = {In this study, the authors propose a novel extended continuous time birth-death model for reliability analysis of a nanocell device. A nanocell consists of conducting nanoparticles connected via randomly placed self-assembled monolayer of molecules. These molecules behave as a negative differential resistor. The mathematical expression for expected nanocell lifetime and its availability, in presence of transient errors is computed. On the basis of the model, an algorithm is developed and implemented in MATLAB, PERL and HSPICE, to automatically generate the proposed model representation for a given nanocell. It is used to estimate the success_ratio as well as the nanocell reliability, while considering the uncertainties induced by transient errors. The theoretical results for reliability are validated by simulating HSPICE model of nanocell in presence of varying defect rates. It is observed that the device reliability increases with increase in the number of nanoparticles and molecules. A lower and upper bounds for nanocell reliability are calculated in theory which is validated in simulations.},
  keywords = {SPICE;molecular electronics; nanoelectronics;nanoparticles; probability;reliability; resistors; HSPICE model;MATLAB;PERL; extended continuous time birth-death model;model representation;nanocell device reliability analysis;nanoparticles;negative differential resistor;probabilistic model;self-assembled monolayer;transient error},
}

In this study, the authors propose a novel extended continuous time birth-death model for reliability analysis of a nanocell device. A nanocell consists of conducting nanoparticles connected via randomly placed self-assembled monolayer of molecules. These molecules behave as a negative differential resistor. The mathematical expression for expected nanocell lifetime and its availability, in presence of transient errors is computed. On the basis of the model, an algorithm is developed and implemented in MATLAB, PERL and HSPICE, to automatically generate the proposed model representation for a given nanocell. It is used to estimate the success_ratio as well as the nanocell reliability, while considering the uncertainties induced by transient errors. The theoretical results for reliability are validated by simulating HSPICE model of nanocell in presence of varying defect rates. It is observed that the device reliability increases with increase in the number of nanoparticles and molecules. A lower and upper bounds for nanocell reliability are calculated in theory which is validated in simulations.

@Article{dhirendra2014awpl,
  author   = {Dhirendra Mathur and Satish K. Bhatnagar and Vineet Sahula},
  title    = {Quick Estimation of Rectangular Patch Antenna Dimensions Based on Equivalent Design Concept},
  journal  = {IEEE Antennas and Wireless Propagation Letters},
  year     = {2014},
  volume   = {13},
  pages    = {1469-1472},
  issn     = {1536-1225},
  doi      = {10.1109/LAWP.2014.2334362},
  url      = {http://ieeexplore.ieee.org/document/6847143/},
  abstract = {This letter presents a new method for quickly estimating the physical dimensions of a rectangular microstrip antenna (RMSA). This is based on the newly introduced concept of Equivalence of Design for RMSA. Two designs are said to be equivalent if they result in the same resonance frequency. This is an outcome of Bhatnagar's postulate. It relates the classical extension in length ?L with the length and width of the patch apart from the substrate thickness. This letter emphasizes the importance of substrate thickness normalized with respect to guided wavelength. This is termed as the H parameter. For RMSA, this is the key parameter rather than the individual parameters-dielectric constant (?r), substrate thickness (h), or resonance frequency (f0). A new parameter-the scaling factor (?)-has been introduced and defined. Based on these, transformation laws have been put forward. These can be used for quickly estimating the RMSA design parameters from a known good design. The laws have been verified by estimating physical parameters of RMSA and then calculating its resonance frequency. This has been repeated for several hundred designs. The matching has been excellent. Simulation and measurement results of a known good design (Design1) and one of the transformed designs (Design3) are also presented. The results of the transformed design are in good agreement with those of Design1 considering fabrication and measurement tolerances.},
  keywords = {approximation theory;microstrip antennas;permittivity;substrates;Bhatnagar postulate;RMSA design parameters;approximation method;dielectric constant;equivalence of design concept;quick estimation;rectangular microstrip antenna;rectangular patch antenna dimensions;resonance frequency;scaling factor;substrate thickness;Dielectric constant;Estimation;Microstrip;Microstrip antennas;Resonant frequency;Substrates;Dielectric constant;microstrip antennas;patch antennas},
}

This letter presents a new method for quickly estimating the physical dimensions of a rectangular microstrip antenna (RMSA). This is based on the newly introduced concept of Equivalence of Design for RMSA. Two designs are said to be equivalent if they result in the same resonance frequency. This is an outcome of Bhatnagar's postulate. It relates the classical extension in length ?L with the length and width of the patch apart from the substrate thickness. This letter emphasizes the importance of substrate thickness normalized with respect to guided wavelength. This is termed as the H parameter. For RMSA, this is the key parameter rather than the individual parameters-dielectric constant (?r), substrate thickness (h), or resonance frequency (f0). A new parameter-the scaling factor (?)-has been introduced and defined. Based on these, transformation laws have been put forward. These can be used for quickly estimating the RMSA design parameters from a known good design. The laws have been verified by estimating physical parameters of RMSA and then calculating its resonance frequency. This has been repeated for several hundred designs. The matching has been excellent. Simulation and measurement results of a known good design (Design1) and one of the transformed designs (Design3) are also presented. The results of the transformed design are in good agreement with those of Design1 considering fabrication and measurement tolerances.

@Article{janki2014sigpro,
  author   = {Sharma, J. B. and Sharma, K. K. and Sahula, Vineet},
  journal  = {Elsevier's Signal Processing},
  title    = {Hybrid image fusion scheme using self-fractional Fourier functions and multivariate empirical mode decomposition},
  year     = {2014},
  issn     = {01651684},
  pages    = {146--159},
  volume   = {100},
  abstract = {Image fusion has emerged as a promising area of research and a bivariate empirical mode decomposition based fusion scheme has recently been proposed in the literature. In this paper, a hybrid fusion scheme combining self-fractional Fourier function (SFFF) decomposition and multivariate empirical mode decomposition is proposed. In the proposed image fusion technique, images to be fused are decomposed into SFFF images. The SFFF images are further decomposed into intrinsic mode functions (IMFs) using multivariate empirical mode decomposition (MEMD). Corresponding IMFs of same decomposition level of SFFF images are fused using local variance based adaptive weight fusion rule to obtain fused IMF images. The fused image is obtained by applying inverse transformation on fused IMF images. The proposed technique provides flexibility in the number of functions in the SFFF decomposition, transform before SFFF decomposition, and the types of source images (real and complex) to be fused. Simulations are performed for fusion of test images with different SFFF decomposition levels and the results are compared with other existing methods. It is seen that the simulation results are comparable to the existing schemes. ?? 2014 Elsevier B.V.},
  doi      = {10.1016/j.sigpro.2014.01.001},
  file     = {:C$\backslash$:/Users/Vineet/Documents/Mendeley Desktop/Sharma, Sharma, Sahula - 2014 - Hybrid image fusion scheme using self-fractional Fourier functions and multivariate empirical mode decom.pdf:pdf},
  keywords = {Fractional Fourier transform, Image fusion, Multivariate empirical mode decomposition, Self-fractional Fourier functions},
  url      = {https://www.sciencedirect.com/science/article/pii/S0165168414000048},
}

Image fusion has emerged as a promising area of research and a bivariate empirical mode decomposition based fusion scheme has recently been proposed in the literature. In this paper, a hybrid fusion scheme combining self-fractional Fourier function (SFFF) decomposition and multivariate empirical mode decomposition is proposed. In the proposed image fusion technique, images to be fused are decomposed into SFFF images. The SFFF images are further decomposed into intrinsic mode functions (IMFs) using multivariate empirical mode decomposition (MEMD). Corresponding IMFs of same decomposition level of SFFF images are fused using local variance based adaptive weight fusion rule to obtain fused IMF images. The fused image is obtained by applying inverse transformation on fused IMF images. The proposed technique provides flexibility in the number of functions in the SFFF decomposition, transform before SFFF decomposition, and the types of source images (real and complex) to be fused. Simulations are performed for fusion of test images with different SFFF decomposition levels and the results are compared with other existing methods. It is seen that the simulation results are comparable to the existing schemes. ?? 2014 Elsevier B.V.

@Article{Kumawat:2014:PMA:2676581.2629533,
  author     = {Kumawat, Renu and Sahula, Vineet and Gaur, Manoj S.},
  title      = {Probabilistic Modeling and Analysis of Molecular Memory},
  journal    = {ACM Journal on Emerging Technology for Computer Systems (JETC)},
  year       = {2014},
  volume     = {11},
  number     = {1},
  pages      = {6:1--6:16},
  month      = oct,
  issn       = {1550-4832},
  doi        = {10.1145/2629533},
  url        = {https://dl.acm.org/citation.cfm?id=2629533},
  acmid      = {2629533},
  address    = {New York, NY, USA},
  articleno  = {6},
  file       = {:C$\backslash$:/Users/Vineet/Documents/Mendeley Desktop/Kumawat, Sahula, Gaur - 2014 - Probabilistic Modeling and Analysis of Molecular Memory.pdf:pdf},
  issue_date = {September 2014},
  keywords   = {Nanocell, emerging device modeling, nano-electronics, nanoparticles, probability, self-assembly},
  numpages   = {16},
  publisher  = {ACM},
}

@Article{patil2013mva,
  author    = {R. A. Patil and V. Sahula and A. S. Mandal},
  doi       = {10.1007/s00138-014-0594-5},
  journal   = {Springer's Journal of Machine Vision and Application},
  number    = {3},
  title     = {Features classification using geometrical deformation feature vector of support vector machine and active appearance algorithm for automatic facial expression recognition},
  url       = {https://link.springer.com/article/10.1007/s00138-014-0594-5},
  volume    = {25},
  year      = {2014},
  month     = {April},
  pages     = {747-761},
  abstract  = {This paper proposes a method for facial expression recognition in image sequences. Face is detected from the scene and then facial features are detected using image normalization, and thresholding techniques. Using an optimization algorithm the Candide wire frame model is adapted properly on the first frame of face image sequence. In the subsequent frames of image sequence facial features are tracked using active appearance algorithm. Once the model fits on the first frame, animation parameters of model are set to zero, to obtain the shape of model for the neutral facial expression of the same face. The last frame of the image sequence corresponds to greatest facial expression intensity. The geometrical displacement of the Candide wire frame nodes, between the neutral expression frame and the last frame, is used as an input to the multiclass support vector machine, which classifies facial expression into one of the class such as happy, surprise, sadness, anger, disgust, fear and neutral. This method is applicable for frontal as well as tilted faces with angle 30, 45, 60 and -30, -45 and -60 degrees with respect to y axis.},
  file      = {:C$\backslash$:/Users/Vineet/Documents/Mendeley Desktop/Patil R. A., Sahula V., Mandal - 2013 - Features classification using geometrical deformation feature vector of support vector machine a.pdf:pdf},
  keywords  = {NormalizationFeature extraction Active appearance modelSVM},
  publisher = {Springer},
}

This paper proposes a method for facial expression recognition in image sequences. Face is detected from the scene and then facial features are detected using image normalization, and thresholding techniques. Using an optimization algorithm the Candide wire frame model is adapted properly on the first frame of face image sequence. In the subsequent frames of image sequence facial features are tracked using active appearance algorithm. Once the model fits on the first frame, animation parameters of model are set to zero, to obtain the shape of model for the neutral facial expression of the same face. The last frame of the image sequence corresponds to greatest facial expression intensity. The geometrical displacement of the Candide wire frame nodes, between the neutral expression frame and the last frame, is used as an input to the multiclass support vector machine, which classifies facial expression into one of the class such as happy, surprise, sadness, anger, disgust, fear and neutral. This method is applicable for frontal as well as tilted faces with angle 30, 45, 60 and -30, -45 and -60 degrees with respect to y axis.

@Article{prasad2014tdmr1,
  author   = {Mahanth Prasad and Vineet Sahula and Vinod Kumar Khanna},
  title    = {ZnO Etching and Microtunnel Fabrication for High-Reliability MEMS Acoustic Sensor},
  journal  = {IEEE Transactions on Device and Materials Reliability},
  year     = {2014},
  volume   = {14},
  number   = {1},
  pages    = {545-554},
  month    = {March},
  issn     = {1530-4388},
  doi      = {10.1109/TDMR.2013.2271245},
  url      = {http://ieeexplore.ieee.org/document/6547706/},
  abstract = {This paper describes a technique for uniform step coverage of aluminum metal (Al) on ZnO film in the fabrication of MEMS acoustic sensor. The MEMS acoustic sensors were fabricated by etching ZnO layer in three different etchants: HCl, NH4Cl with electrolytically added copper ions, and NH4OH with electrolytically added copper ions. For the first time, a technique is reported, which uses aqueous NH4OH solution with electrolytically added copper ions for etching of ZnO layer. For reliable operation of the device, the electrical testing of Al step coverage on ZnO layer was performed. The maximum currents that can be drawn across Al-deposited ZnO edge etched by HCl, Cu-added NH4Cl, and Cu-added NH4OH were 40 mA, 2.5 A, and 3.0 A respectively, without any damage to the structures. The investigations show that uniform Al step coverage on ZnO layer is obtained in case of NH4OH with electrolytically added copper ions. During fabrication of the device, a novel technique for building a microtunnel for pressure compensation was also developed. This microtunnel is used to compensate the pressure applied on the silicon diaphragm by connecting the cavity to the atmosphere. To realize the smooth inlet of microtunnel in the cavity, photoresist SU8 was used for patterning the cavity after microtunnel etching. The developed technique for microtunnel fabrication reduces the process complexity, providing improved yield of the device. The packaged device performed satisfactorily in the sound pressure level (SPL) of 120-160 dB over a wide frequency range of 30-8000 Hz. The maximum sensitivity of the sensor was measured as 380 ?V/Pa.},
  keywords = {II-VI semiconductors;microfabrication;microsensors;photoresists;wide band gap semiconductors;zinc compounds;MEMS acoustic sensor;ZnO;ZnO film;ZnO layer etching;aluminum metal;current 2.5 A;current 3.0 A;current 40 mA;electrical testing;electrolytically added copper ions;etchants;frequency 30 Hz to 8000 Hz;microtunnel etching;microtunnel fabrication;photoresist SU8;pressure compensation;reliability;silicon diaphragm;Electrolytes;Micromachining;Electrolytic copper addition;Si-diaphragm;TMAH;ZnO film;bulk micromachining},
}

This paper describes a technique for uniform step coverage of aluminum metal (Al) on ZnO film in the fabrication of MEMS acoustic sensor. The MEMS acoustic sensors were fabricated by etching ZnO layer in three different etchants: HCl, NH4Cl with electrolytically added copper ions, and NH4OH with electrolytically added copper ions. For the first time, a technique is reported, which uses aqueous NH4OH solution with electrolytically added copper ions for etching of ZnO layer. For reliable operation of the device, the electrical testing of Al step coverage on ZnO layer was performed. The maximum currents that can be drawn across Al-deposited ZnO edge etched by HCl, Cu-added NH4Cl, and Cu-added NH4OH were 40 mA, 2.5 A, and 3.0 A respectively, without any damage to the structures. The investigations show that uniform Al step coverage on ZnO layer is obtained in case of NH4OH with electrolytically added copper ions. During fabrication of the device, a novel technique for building a microtunnel for pressure compensation was also developed. This microtunnel is used to compensate the pressure applied on the silicon diaphragm by connecting the cavity to the atmosphere. To realize the smooth inlet of microtunnel in the cavity, photoresist SU8 was used for patterning the cavity after microtunnel etching. The developed technique for microtunnel fabrication reduces the process complexity, providing improved yield of the device. The packaged device performed satisfactorily in the sound pressure level (SPL) of 120-160 dB over a wide frequency range of 30-8000 Hz. The maximum sensitivity of the sensor was measured as 380 ?V/Pa.

@Article{prasad2014tdmr2,
  author   = {Mahanth Prasad and Vineet Sahula and Vinod Kumar Khanna},
  title    = {Long-Term Effects of Relative Humidity on the Performance of ZnO-Based MEMS Acoustic Sensors},
  journal  = {IEEE Transactions on Device and Materials Reliability},
  year     = {2014},
  volume   = {14},
  number   = {2},
  pages    = {778-780},
  month    = {June},
  issn     = {1530-4388},
  doi      = {10.1109/TDMR.2014.2317415},
  url      = {http://ieeexplore.ieee.org/document/6798753/},
  abstract = {This paper investigates the long-term repercussions of relative humidity on capacitance and dissipation factor tan ? of ZnO-based MEMS acoustic sensors. During the fabrication process, a ZnO layer covered with a 0.3-?m-thick PECVD layer was sandwiched between two aluminum (Al) electrodes on a 25-?m-thick silicon diaphragm made by a bulk micromachining technique. The fabrication of an acoustic sensor chip was then completed by etching a ZnO layer in the presence of strong acid (HCl) and weak acid (NH4Cl with electrolytically added Cu ions), separately. Post fabrication, under the humid environment conditions prevailing over a long period of time, viz., 150 days, with relative humidity between 60% and 80%, the capacitance values were found to be 1.5 times higher than the original values in the case of strong acid. The corresponding losses tan ? increased from 0.03 to 0.06. However, under the same conditions, the capacitance values did not change for the acoustic chips fabricated using weak acid. The deterioration in frequency and sensitivity responses of the packaged device has been also observed in the case of etching using strong acid. The investigations showed that a 0.3-?m-thick PECVD silicon dioxide as a passivating layer could protect the sensors from ambient humidity over a long period of time, because of a positive slope of a ZnO edge. However, the response of the devices for a negative slope of a ZnO edge was affected due to nonuniform step coverage of a ZnO layer.},
  keywords = {etching;micromachining;microsensors;passivation;plasma CVD;Al;MEMS acoustic sensors;PECVD layer;PECVD silicon dioxide;Si;ZnO;acoustic sensor chip;aluminum electrodes;bulk micromachining technique;dissipation factor;etching;fabrication process;frequency response;humid environment conditions;passivating layer;relative humidity;sensitivity response;silicon diaphragm;size 0.3 mum;size 25 mum;weak acid;Acoustic measurements;Acoustic sensors;Capacitance;Etching;Humidity;Loss measurement;Zinc oxide;MEMS acoustic sensor;ZnO;bulk micromachining;humidity},
}

This paper investigates the long-term repercussions of relative humidity on capacitance and dissipation factor tan ? of ZnO-based MEMS acoustic sensors. During the fabrication process, a ZnO layer covered with a 0.3-?m-thick PECVD layer was sandwiched between two aluminum (Al) electrodes on a 25-?m-thick silicon diaphragm made by a bulk micromachining technique. The fabrication of an acoustic sensor chip was then completed by etching a ZnO layer in the presence of strong acid (HCl) and weak acid (NH4Cl with electrolytically added Cu ions), separately. Post fabrication, under the humid environment conditions prevailing over a long period of time, viz., 150 days, with relative humidity between 60% and 80%, the capacitance values were found to be 1.5 times higher than the original values in the case of strong acid. The corresponding losses tan ? increased from 0.03 to 0.06. However, under the same conditions, the capacitance values did not change for the acoustic chips fabricated using weak acid. The deterioration in frequency and sensitivity responses of the packaged device has been also observed in the case of etching using strong acid. The investigations showed that a 0.3-?m-thick PECVD silicon dioxide as a passivating layer could protect the sensors from ambient humidity over a long period of time, because of a positive slope of a ZnO edge. However, the response of the devices for a negative slope of a ZnO edge was affected due to nonuniform step coverage of a ZnO layer.

@Article{janki2013joptics,
  author    = {Sharma, J B and Sharma, K K and Sahula, Vineet},
  title     = {Digital image dual watermarking using self-fractional fourier functions, bivariate empirical mode decomposition and error correcting code},
  journal   = {Springer's Journal of Optics},
  year      = {2013},
  pages     = {1--14},
  doi       = {10.1007/s12596-013-0125-1},
  url       = {https://link.springer.com/article/10.1007/s12596-013-0125-1},
  file      = {:C$\backslash$:/Users/Vineet/Documents/Mendeley Desktop/Sharma, Sharma, Sahula - 2013 - Digital image dual watermarking using self-fractional fourier functions, bivariate empirical mode dec(2).pdf:pdf},
  owner     = {Vineet},
  publisher = {Springer-Verlag},
  timestamp = {2016.08.21},
}

@Article{lokesh2013ecletter,
  author   = {Lokesh Garg and Vineet Sahula},
  title    = {Efficient CMOS subthreshold leakage analysis with improved stack based models in presence of parameter variations},
  journal  = {IET Electronics Letters},
  year     = {2013},
  volume   = {49},
  number   = {10},
  pages    = {644-646},
  month    = {May},
  issn     = {0013-5194},
  doi      = {10.1049/el.2012.4311},
  url      = {http://ieeexplore.ieee.org/document/6528801/},
  abstract = {Presented is the error that occurs while estimating subthreshold leakage power of parallel transistor stacks in CMOS gates using leakage power models when there is no consideration of the manufacturing variations, i.e. device geometry related effects in width. For the purpose, efficient support vector machine based macromodels for characterising the transistor stacks of CMOS gates are reported, considering process parameter variations impacting e.g. length, threshold voltage, oxide thickness, supply voltage, temperature and width of the transistors. The experiments show that maximum error can go up to ~15% for AOI22 and OAI22 gate under nominal values of varying parameters without considering manufacturing variations in the width.},
  keywords = {CMOS integrated circuits;electronic engineering computing;support vector machines;transistor circuits;CMOS gates;CMOS subthreshold leakage analysis;leakage power models;parallel transistor stacks;parameter variations;stack based models;support vector machine},
}

Presented is the error that occurs while estimating subthreshold leakage power of parallel transistor stacks in CMOS gates using leakage power models when there is no consideration of the manufacturing variations, i.e. device geometry related effects in width. For the purpose, efficient support vector machine based macromodels for characterising the transistor stacks of CMOS gates are reported, considering process parameter variations impacting e.g. length, threshold voltage, oxide thickness, supply voltage, temperature and width of the transistors. The experiments show that maximum error can go up to  15% for AOI22 and OAI22 gate under nominal values of varying parameters without considering manufacturing variations in the width.

@Article{prasad2013a,
  author    = {Prasad, Mahanth and Sahula, Vineet Sahula and Khanna, V. K.},
  title     = {Zinc Oxide deposition and etching for MEMS acoustic sensor},
  journal   = {Journal of Sensor Techniques {\&} Applications},
  year      = {2013},
  owner     = {Vineet},
  timestamp = {2016.08.21},
}

@Article{prasad2013tsem,
  author   = {Mahanth Prasad and Vineet Sahula and Vinod Kumar Khanna},
  title    = {Design and Fabrication of Si-Diaphragm, ZnO Piezoelectric Film-Based MEMS Acoustic Sensor Using SOI Wafers},
  journal  = {IEEE Transactions on Semiconductor Manufacturing},
  year     = {2013},
  volume   = {26},
  number   = {2},
  pages    = {233-241},
  month    = {May},
  issn     = {0894-6507},
  doi      = {10.1109/TSM.2013.2238956},
  url      = {http://ieeexplore.ieee.org/document/6410046/},
  abstract = {This paper reports a simpler technique for fabricating an microelectromechanical system acoustic sensor based on a piezoelectric zinc oxide (ZnO) thin film, utilizing silicon-on-insulator wafers. A highly c-axis-oriented ZnO film of thickness 2.4 ?m, which is covered with 0.2-?m-thick PECVD SiO2, is sandwiched between two aluminum electrodes on a 25- ?m-thick silicon diaphragm. This diaphragm thickness has been optimized to withstand sound pressure level range of 120-160 dB. Stress distribution studies using ANSYS have been performed to determine the locations for placement of capacitor electrodes. This paper also reports a technique for the creation of a positive slope of the ZnO step to ensure proper coverage during Al metallization. In order to maximize yield, process steps have been developed to avoid the microtunnel blockage by silicon/glass particles. The packaged sensor is found to exhibit a sensitivity of 382 ?V/Pa (RMS) in the frequency range from 30 to 8000 Hz, under varying acoustic pressure.},
  keywords = {aluminium;chemical vapour deposition;micromechanical devices;piezoelectric thin films;silicon-on-insulator;zinc compounds;ANSYS;Al metallization;MEMS acoustic sensor;PECVD SiO2;SOI wafer;Si;Si-diaphragm;SiO2;ZnO;acoustic pressure;aluminum electrode;c-axis-oriented ZnO film;capacitor electrode;frequency 30 Hz to 8000 Hz;glass particle;microelectromechanical system;microtunnel blockage;piezoelectric thin film;piezoelectric zinc oxide;silicon particle;silicon-on-insulator wafer;size 0.2 micron;size 2.4 micron;size 25 micron;sound pressure level;stress distribution;Acoustic sensors;Cavity resonators;Etching;Fabrication;Sensitivity;Silicon;Zinc oxide;Diaphragm;silicon-on-insulator (SOI) substrate;sound pressure level (SPL);thin film;zinc oxide (ZnO) film},
}

This paper reports a simpler technique for fabricating an microelectromechanical system acoustic sensor based on a piezoelectric zinc oxide (ZnO) thin film, utilizing silicon-on-insulator wafers. A highly c-axis-oriented ZnO film of thickness 2.4 ?m, which is covered with 0.2-?m-thick PECVD SiO2, is sandwiched between two aluminum electrodes on a 25- ?m-thick silicon diaphragm. This diaphragm thickness has been optimized to withstand sound pressure level range of 120-160 dB. Stress distribution studies using ANSYS have been performed to determine the locations for placement of capacitor electrodes. This paper also reports a technique for the creation of a positive slope of the ZnO step to ensure proper coverage during Al metallization. In order to maximize yield, process steps have been developed to avoid the microtunnel blockage by silicon/glass particles. The packaged sensor is found to exhibit a sensitivity of 382 ?V/Pa (RMS) in the frequency range from 30 to 8000 Hz, under varying acoustic pressure.

@Article{soni2013,
  author  = {Mahesh Soni and Vineet Sahula},
  title   = {Power-delay Product Optimal Design of Sequential Circuits Using Carbon Nanotubes},
  journal = {Journal of VLSI Design Tools \& Technology (JoVDTT)},
  year    = {2013},
  volume  = {3},
  number  = {3},
  issn    = {ISSN: 2249–474X},
  url     = {http://engineeringjournals.stmjournals.in/index.php/JoVDTT/article/view/2854},
}

@Article{boolchandani2012variability,
  author    = {Boolchandani, D and Garg, Lokesh and Khandelwal, Sapna and Sahula, Vineet},
  title     = {Variability aware SVM macromodel based design centering of analog circuits},
  journal   = {Spinger's Analog Integrated Circuits and Signal Processing},
  year      = {2012},
  volume    = {73},
  number    = {1},
  pages     = {77--87},
  doi       = {10.1007/s10470-011-9799-y},
  url       = {https://link.springer.com/article/10.1007%2Fs10470-011-9799-y},
  file      = {:C$\backslash$:/Users/Vineet/Documents/Mendeley Desktop/Boolchandani et al. - 2012 - Variability aware SVM macromodel based design centering of analog circuits.pdf:pdf},
  publisher = {Springer},
}

@Article{namita2013ijascse,
  author        = {Sharma, Namita and Sahula, Vineet and Ravikumar, C. P.},
  title         = {Energy Aware Task Scheduling for Soft Real Time Systems using an Analytical Approach for Energy Estimation},
  journal       = {International Journal of Advanced Studies in Computers, Science and Engineering (IJASCSE)},
  year          = {2012},
  volume        = {1},
  number        = {4},
  pages         = {33--39},
  url           = {http://arxiv.org/abs/1303.0725},
  abstract      = {Embedded systems have pervaded all walks of our life. With the increasing importance of mobile embedded systems and flexible applications, considerable progress in research has been made for power management. Power constraints are increasingly becoming the critical component of the design specifications of these systems. It helps in pre-determining the suitable hardware architecture for the target application. The aim of this paper is to present a technique to estimate 'pre-run time' and 'power' of a software mapped onto a hardware system; guaranteeing the compliance of temporal constraints while generating a schedule of tasks of software. Real time systems must handle several independent macro-tasks, each represented by a task graph, which includes communications and precedence constraints. We propose a novel approach for power estimation of embedded software using the Control Data Flow Graph (CDFG) or task graph model. This methodology uses an existing Hierarchical Concurrent Flow Graph (HCFG) technique for the power analysis of the CDFGs. We have evaluated our technique for energy efficient scheduling over various task graph benchmarks. The results obtained prove the utility and efficacy of our proposed approach for power analysis of embedded software. We also present a methodology to obtain an energy optimal voltage assignment and perform scheduling by taking advantage of the relaxation in execution time of tasks.},
  archiveprefix = {arXiv},
  arxivid       = {1303.0725},
  eprint        = {1303.0725},
  file          = {:C$\backslash$:/Users/Vineet/Documents/Mendeley Desktop/energy{\_}aware{\_}task-harvard.pdf:pdf},
  publisher     = {ISSN 2278-7917},
}

Embedded systems have pervaded all walks of our life. With the increasing importance of mobile embedded systems and flexible applications, considerable progress in research has been made for power management. Power constraints are increasingly becoming the critical component of the design specifications of these systems. It helps in pre-determining the suitable hardware architecture for the target application. The aim of this paper is to present a technique to estimate 'pre-run time' and 'power' of a software mapped onto a hardware system; guaranteeing the compliance of temporal constraints while generating a schedule of tasks of software. Real time systems must handle several independent macro-tasks, each represented by a task graph, which includes communications and precedence constraints. We propose a novel approach for power estimation of embedded software using the Control Data Flow Graph (CDFG) or task graph model. This methodology uses an existing Hierarchical Concurrent Flow Graph (HCFG) technique for the power analysis of the CDFGs. We have evaluated our technique for energy efficient scheduling over various task graph benchmarks. The results obtained prove the utility and efficacy of our proposed approach for power analysis of embedded software. We also present a methodology to obtain an energy optimal voltage assignment and perform scheduling by taking advantage of the relaxation in execution time of tasks.

@Article{patil2012features,
  author    = {Patil, Rajesh A and Sahula, Vineet and Mandal, Atanendu S},
  title     = {Features classification using support vector machine for a facial expression recognition system},
  journal   = {SPIE Journal of Electronic Imaging},
  year      = {2012},
  volume    = {21},
  number    = {4},
  pages     = {43001--43003},
  month     = {Oct.},
  doi       = {10.1117/1.JEI.21.4.043003},
  url       = {https://www.spiedigitallibrary.org/journals/Journal-of-Electronic-Imaging/volume-21/issue-4/043003/Features-classification-using-support-vector-machine-for-a-facial-expression/10.1117/1.JEI.21.4.043003.short?SSO=1},
  abstract  = {A methodology for automatic facial expression recognition in image sequences is proposed, which makes use of the Candide wire frame model and an active appearance algorithm for tracking, and support vector machine (SVM) for classification. A face is detected automatically from the given image sequence and by adapting the Candide wire frame model properly on the first frame of face image sequence, facial features in the subsequent frames are tracked using an active appearance algorithm. The algorithm adapts the Candide wire frame model to the face in each of the frames and then automatically tracks the grid in consecutive video frames over time. We require that first frame of the image sequence corresponds to the neutral facial expression, while the last frame of the image sequence corresponds to greatest intensity of facial expression. The geometrical displacement of Candide wire frame nodes, defined as the difference of the node coordinates between the first and the greatest facial expression intensity frame, is used as an input to the SVM, which classify the facial expression into one of the classes viz happy, surprise, sadness, anger, disgust, and fear.},
  file      = {:C$\backslash$:/Users/Vineet/Documents/Mendeley Desktop/Patil, Sahula, Mandal - 2012 - Features classification using support vector machine for a facial expression recognition system.pdf:pdf},
  publisher = {International Society for Optics and Photonics},
}

A methodology for automatic facial expression recognition in image sequences is proposed, which makes use of the Candide wire frame model and an active appearance algorithm for tracking, and support vector machine (SVM) for classification. A face is detected automatically from the given image sequence and by adapting the Candide wire frame model properly on the first frame of face image sequence, facial features in the subsequent frames are tracked using an active appearance algorithm. The algorithm adapts the Candide wire frame model to the face in each of the frames and then automatically tracks the grid in consecutive video frames over time. We require that first frame of the image sequence corresponds to the neutral facial expression, while the last frame of the image sequence corresponds to greatest intensity of facial expression. The geometrical displacement of Candide wire frame nodes, defined as the difference of the node coordinates between the first and the greatest facial expression intensity frame, is used as an input to the SVM, which classify the facial expression into one of the classes viz happy, surprise, sadness, anger, disgust, and fear.

@Article{prasad2012fem,
  author    = {Prasad, Mahanth and Yadav, R.P. P and Sahula, V. and Khanna, V.K. K},
  title     = {FEM simulation of platinum-based microhotplate using different dielectric membranes for gas sensing applications},
  journal   = {Sensor Review},
  year      = {2012},
  volume    = {32},
  number    = {1},
  pages     = {59--65},
  issn      = {0260-2288},
  doi       = {10.1108/02602281211197152},
  url       = {http://www.emeraldinsight.com/doi/full/10.1108/02602281211197152},
  abstract  = {Purpose - The purpose of this paper is to help reduce power consumption by using platinum-based microhotplate with different dielectric membranes SiO2 and Si3N4 for gas sensing applications, and to develop platinum lift-off process using DC sputtering method for fabrication of platinum resistor. Design/methodology/approach - Semiconductor gas sensors normally require high power consumption because of their elevated operating temperature 300-600C. Considering the thermal resistant and sensitive characteristics of metal platinum as well as heat and electricity insulating characteristics of SiO2, Si3N4 and combination of both, a kind of the Si-substrate microhotplate was designed and simulated using ANSYS 10.0 tool. Thermal oxidation of Si wafer was carried out to get a 1.0?IT/ITm thick SiO2 layer. Pt deposition on oxidized silicon substrate by lift-off was carried out using DC sputtering technique. Findings - The platinum-based microhotplate requires 31.3-70.5?mW power to create the temperature 348-752C for gas sensing applications. The SiO2 membrane can operate the gas sensitive film at higher temperature than the Si3N4 and combination of both the membranes at same power consumption. The paper also presents the FEM simulation of different heating elements like nichrome and tantalum and its comparison to platinum for microhotplate applications. Originality/value - Both the simulation and experimental work provides the low cost, high yield and repeatability in realization of microhotplate. The design and simulation work provides the better selection of heating elements and dielectric membranes. The developed experimental process provides the easy fabrication of platinum resistors using DC sputtering technique. {\textcopyright} 2012 Emerald Group Publishing Limited. All rights reserved.},
  file      = {:C$\backslash$:/Users/Vineet/Documents/Mendeley Desktop/Prasad et al. - 2012 - FEM simulation of platinum-based microhotplate using different dielectric membranes for gas sensing applicatio(2).pdf:pdf},
  publisher = {Emerald Group Publishing Limited},
}

Purpose - The purpose of this paper is to help reduce power consumption by using platinum-based microhotplate with different dielectric membranes SiO2 and Si3N4 for gas sensing applications, and to develop platinum lift-off process using DC sputtering method for fabrication of platinum resistor. Design/methodology/approach - Semiconductor gas sensors normally require high power consumption because of their elevated operating temperature 300-600C. Considering the thermal resistant and sensitive characteristics of metal platinum as well as heat and electricity insulating characteristics of SiO2, Si3N4 and combination of both, a kind of the Si-substrate microhotplate was designed and simulated using ANSYS 10.0 tool. Thermal oxidation of Si wafer was carried out to get a 1.0?IT/ITm thick SiO2 layer. Pt deposition on oxidized silicon substrate by lift-off was carried out using DC sputtering technique. Findings - The platinum-based microhotplate requires 31.3-70.5?mW power to create the temperature 348-752C for gas sensing applications. The SiO2 membrane can operate the gas sensitive film at higher temperature than the Si3N4 and combination of both the membranes at same power consumption. The paper also presents the FEM simulation of different heating elements like nichrome and tantalum and its comparison to platinum for microhotplate applications. Originality/value - Both the simulation and experimental work provides the low cost, high yield and repeatability in realization of microhotplate. The design and simulation work provides the better selection of heating elements and dielectric membranes. The developed experimental process provides the easy fabrication of platinum resistors using DC sputtering technique. © 2012 Emerald Group Publishing Limited. All rights reserved.

@Article{prasad2012jmems,
  author   = {Mahanth Prasad and R. P. Yadav and Vineet Sahula and Vinod K. Khanna and Chandra Shekhar},
  title    = {Controlled Chemical Etching of ZnO Film for Step Coverage in MEMS Acoustic Sensor},
  journal  = {IEEE Journal of Microelectromechanical Systems},
  year     = {2012},
  volume   = {21},
  number   = {3},
  pages    = {517-519},
  month    = {June},
  issn     = {1057-7157},
  doi      = {10.1109/JMEMS.2012.2189362},
  url      = {http://ieeexplore.ieee.org/document/6175094/},
  abstract = {In this letter, we report a novel wet etching technique of a c -axis-oriented ZnO film that solves the step coverage problem during formation of electrodes on this film. The negative profile or hanging structure of ZnO film deposited by RF magnetron sputtering was obtained during wet etching in HCl and NH4Cl solutions. The developed technique uses aqueous NH4Cl with electrolytically added copper ions. By suspending the wafer in the horizontal direction in a 20\% NH4Cl solution, positive slope (more than 90 ) was obtained at the edge of the ZnO film. In this process, p-type ?100? silicon wafers of 10-20-?cm resistivity have been used. Al deposition was done to confirm the step coverage on ZnO film after getting the positive slope. The thickness of ZnO film was varied from 1.3 to 3.4 ?m to observe the coverage of sidewall of ZnO film. The structure was also electrically tested and was found to function satisfactorily.},
  keywords = {II-VI semiconductors;acoustic transducers;electrochemical electrodes;microsensors;piezoelectric semiconductors;semiconductor thin films;sputter deposition;sputter etching;wetting;wide band gap semiconductors;zinc compounds;MEMS acoustic sensor;RF magnetron sputtering film deposition;Si;ZnO;controlled chemical etching;electrolytical added copper ion;film electrode formation;hanging structure;negative profile;positive slope;resistivity 10 ohmcm to 20 ohmcm;size 1.3 mum to 3.4 mum;step coverage problem;wafer suspension;wet etching technique;Aluminum;Copper;Electrodes;Etching;Fabrication;Sputtering;Zinc oxide;Electrolytic copper addition;piezoelectric ZnO film;positive slope;step coverage},
}

In this letter, we report a novel wet etching technique of a c -axis-oriented ZnO film that solves the step coverage problem during formation of electrodes on this film. The negative profile or hanging structure of ZnO film deposited by RF magnetron sputtering was obtained during wet etching in HCl and NH4Cl solutions. The developed technique uses aqueous NH4Cl with electrolytically added copper ions. By suspending the wafer in the horizontal direction in a 20% NH4Cl solution, positive slope (more than 90 ) was obtained at the edge of the ZnO film. In this process, p-type ?100? silicon wafers of 10-20-?cm resistivity have been used. Al deposition was done to confirm the step coverage on ZnO film after getting the positive slope. The thickness of ZnO film was varied from 1.3 to 3.4 ?m to observe the coverage of sidewall of ZnO film. The structure was also electrically tested and was found to function satisfactorily.

@Article{boolchandani2011efficient,
  author    = {Boolchandani, Dharmendar and Ahmed, Abrar and Sahula, Vineet},
  title     = {Efficient kernel functions for support vector machine regression model for analog circuits' performance evaluation},
  journal   = {Springer's Analog Integrated Circuits and Signal Processing},
  year      = {2011},
  volume    = {66},
  number    = {1},
  pages     = {117--128},
  doi       = {10.1007/s10470-010-9476-6},
  url       = {https://link.springer.com/article/10.1007/s10470-010-9476-6},
  file      = {:C$\backslash$:/Users/Vineet/Documents/Mendeley Desktop/Boolchandani, Ahmed, Sahula - 2011 - Efficient kernel functions for support vector machine regression model for analog circuits' perform.pdf:pdf},
  publisher = {Springer},
}

@Article{boolchandani2011exploring,
  author   = {Boolchandani, D and Sahula, Vineet},
  journal  = {Journal of Design, Analysis and Tools for Integrated Circuits and Systems (JDATICS)},
  title    = {Exploring Efficient Kernel Functions for Support Vector Machine Based Feasibility Models for Analog Circuits},
  year     = {2011},
  number   = {1},
  volume   = {1},
  doi      = {10.1.1.149.656},
  file     = {:C$\backslash$:/Users/Vineet/Documents/Mendeley Desktop/Boolchandani, Sahula - 2011 - Exploring Efficient Kernel Functions for Support Vector Machine Based Feasibility Models for Analog Circui.pdf:pdf},
  isbn     = {9789881701275},
  keywords = {1, analog synthesis, chine, designer such that the, devices are not excessively, eqn, feasibility classification, ge-, into the form of, kernel, large, macromodels, ometry constraint are transformed, support vector ma-},
  url      = {http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.149.656},
}

@Article{prasad2011,
  author  = {Prasad, Mahanth and Bhateja, Robin and Yadav, R P and Sahula, V and Khanna, V K},
  title   = {A Novel Design and Mathematical Model for Sensitivity of a MEMS based Piezoelectric Acoustic Sensor},
  journal = {International Journal of Applied Engineering Research},
  year    = {2011},
  volume  = {6},
  number  = {18},
  pages   = {2211--2216},
  file    = {:C$\backslash$:/Users/Vineet/Documents/Mendeley Desktop/Prasad et al. - 2011 - A Novel Design and Mathematical Model for Sensitivity of a MEMS based Piezoelectric Acoustic Sensor.pdf:pdf;:C$\backslash$:/Users/Vineet/Documents/Mendeley Desktop/abstract{\_}ishm{\_}workshop.pdf:pdf},
}

@Article{prasad2011a,
  author   = {Prasad, M. and Yadav, R.P. and Sahula, V. and Khanna, V.K.},
  journal  = {Elsevier's Sensors and Transducers Journal},
  title    = {Design and simulation of double-spiral shape micro-heater for gas sensing applications},
  year     = {2011},
  issn     = {17265479},
  number   = {6},
  pages    = {135--141},
  volume   = {129},
  abstract = {The paper presents the design and simulation of double spiral shape micro-heater using ANSYS 10.0 and MATLAB, which requires 12.5 mW-78.3 mW powers to create the temperature 181 C-1002 C for gas sensing applications. The results obtained from ANSYS simulation were verified using MATLAB Tool. A platinum-based bulk micro-machined hotplate of size 500 $\mu$m × 500 $\mu$m has been designed for fabrication as a multi-layer structure on a silicon substrate with thermal silicon dioxide as the supporting membrane, followed by LPCVD (Low pressure chemical vapor deposition) silicon nitride film. Gas sensing film (SnO2) will be deposited on the interdigitated Pt electrodes formed on the PECVD oxide layer. The temperature uniformity of microhotplate (as it is essential for better sensing mechanism) based on double spiral heater has been reported in this paper. To estimate the resistance of the Pt heater, a 2000 A thick platinum film has been deposited by sputtering on silicon and its sheet resistance has been measured as 2.5 Ohm/square. We have used this value to calculate the resistance of Pt resistor, which was found 319 Ohm. {\textcopyright} 2011 IFSA.},
  keywords = {ANSYS simulation, Bulk-micromachining, Gas sensor, Microhotplate, Pt-heater},
  url      = {http://www.sensorsportal.com/HTML/DIGEST/june_2011/P_817.pdf},
}

The paper presents the design and simulation of double spiral shape micro-heater using ANSYS 10.0 and MATLAB, which requires 12.5 mW-78.3 mW powers to create the temperature 181 C-1002 C for gas sensing applications. The results obtained from ANSYS simulation were verified using MATLAB Tool. A platinum-based bulk micro-machined hotplate of size 500 $μ$m × 500 $μ$m has been designed for fabrication as a multi-layer structure on a silicon substrate with thermal silicon dioxide as the supporting membrane, followed by LPCVD (Low pressure chemical vapor deposition) silicon nitride film. Gas sensing film (SnO2) will be deposited on the interdigitated Pt electrodes formed on the PECVD oxide layer. The temperature uniformity of microhotplate (as it is essential for better sensing mechanism) based on double spiral heater has been reported in this paper. To estimate the resistance of the Pt heater, a 2000 A thick platinum film has been deposited by sputtering on silicon and its sheet resistance has been measured as 2.5 Ohm/square. We have used this value to calculate the resistance of Pt resistor, which was found 319 Ohm. © 2011 IFSA.

@Article{ulhas2010ijssst,
  author  = {U. Deshmukh and Vineet Sahula},
  journal = {International Journal of Simulation: Systems, Science and Technology {IJSSST}},
  title   = {Performance evaluation of Arbitration schemes of bus-based communication architectures based on Interactive Generalized Semi Markov Process Model {(IGSMP)}},
  year    = {2010},
  number  = {3},
  url     = {http://ijssst.info/Vol-11/No-3/paper7.pdf},
  volume  = {11},
  file    = {:C$\backslash$:/Users/Vineet/Documents/Mendeley Desktop/Sahula, V. - 2010 - Performance evaluation of Arbitration schemes of bus-based communication architectures based on Interactive Generali.pdf:pdf},
}