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  2022 (4)
Bitslice Masking and Improved Shuffling: How and When to Mix Them in Software?. Azouaoui, M.; Bronchain, O.; Grosso, V.; and Papagiannopoulos, K. IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022(2): 140–165. 2022.
Bitslice Masking and Improved Shuffling: How and When to Mix Them in Software? [link]Paper   doi   link   bibtex  
Low-latency implementation of the GIFT cipher on RISC-V architectures. Pojoga, G.; and Papagiannopoulos, K. In Sterpone, L.; Bartolini, A.; and Butko, A., editor(s), CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17 - 22, 2022, pages 287–295, 2022. ACM
Low-latency implementation of the GIFT cipher on RISC-V architectures [link]Paper   doi   link   bibtex  
Anomaly detection to improve security of big data analytics. Slooff, T.; Regazzoni, F.; Brocheton, F.; Parodi, A.; and Cmar, R. In Sterpone, L.; Bartolini, A.; and Butko, A., editor(s), CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17 - 22, 2022, pages 205–206, 2022. ACM
Anomaly detection to improve security of big data analytics [link]Paper   doi   link   bibtex  
The Side-Channel Metric Cheat Sheet. Papagiannopoulos, K.; Glamocanin, O.; Azouaoui, M.; Ros, D.; Regazzoni, F.; and Stojilovic, M. IACR Cryptol. ePrint Arch.,253. 2022.
The Side-Channel Metric Cheat Sheet [link]Paper   link   bibtex  
  2021 (22)
A new model for forensic data extraction from encrypted mobile devices. Fukami, A.; Stoykova, R.; and Geradts, Z. J. M. H. Digit. Investig., 38: 301169. 2021.
A new model for forensic data extraction from encrypted mobile devices [link]Paper   doi   link   bibtex  
Guest Editors' Introduction: Special Issue on Top Picks in Hardware and Embedded Security. Cammarota, R.; and Regazzoni, F. IEEE Des. Test, 38(3): 5–6. 2021.
Guest Editors' Introduction: Special Issue on Top Picks in Hardware and Embedded Security [link]Paper   doi   link   bibtex  
Exploring Parallelism to Improve the Performance of FrodoKEM in Hardware. Howe, J.; Martinoli, M.; Oswald, E.; and Regazzoni, F. J. Cryptogr. Eng., 11(4): 317–327. 2021.
Exploring Parallelism to Improve the Performance of FrodoKEM in Hardware [link]Paper   doi   link   bibtex  
An Instruction Set Extension to Support Software-Based Masking. Gao, S.; Großschädl, J.; Marshall, B.; Page, D.; Pham, T. H.; and Regazzoni, F. IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021(4): 283–325. 2021.
An Instruction Set Extension to Support Software-Based Masking [link]Paper   doi   link   bibtex  
Tool of Spies: Leaking your IP by Altering the 3D Printer Compiler. Chhetri, S. R.; Barua, A.; Faezi, S.; Regazzoni, F.; Canedo, A.; and Faruque, M. A. A. IEEE Trans. Dependable Secur. Comput., 18(2): 667–678. 2021.
Tool of Spies: Leaking your IP by Altering the 3D Printer Compiler [link]Paper   doi   link   bibtex  
Blind Side-Channel SIFA. Azouaoui, M.; Papagiannopoulos, K.; and Zürner, D. In Design, Automation & Test in Europe Conference & Exhibition, DATE 2021, Grenoble, France, February 1-5, 2021, pages 555–560, 2021. IEEE
Blind Side-Channel SIFA [link]Paper   doi   link   bibtex  
A Deeper Look at the Energy Consumption of Lightweight Block Ciphers. Caforio, A.; Balli, F.; Banik, S.; and Regazzoni, F. In Design, Automation & Test in Europe Conference & Exhibition, DATE 2021, Grenoble, France, February 1-5, 2021, pages 170–175, 2021. IEEE
A Deeper Look at the Energy Consumption of Lightweight Block Ciphers [link]Paper   doi   link   bibtex  
Shared FPGAs and the Holy Grail: Protections against Side-Channel and Fault Attacks. Glamocanin, O.; Mahmoud, D. G.; Regazzoni, F.; and Stojilovic, M. In Design, Automation & Test in Europe Conference & Exhibition, DATE 2021, Grenoble, France, February 1-5, 2021, pages 1645–1650, 2021. IEEE
Shared FPGAs and the Holy Grail: Protections against Side-Channel and Fault Attacks [link]Paper   doi   link   bibtex  
EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms. Pilato, C.; Böhm, S.; Brocheton, F.; Castrillón, J.; Cevasco, R.; Cima, V.; Cmar, R.; Diamantopoulos, D.; Ferrandi, F.; Martinovic, J.; Palermo, G.; Paolino, M.; Parodi, A.; Pittaluga, L.; Raho, D.; Regazzoni, F.; Slaninová, K.; and Hagleitner, C. In Design, Automation & Test in Europe Conference & Exhibition, DATE 2021, Grenoble, France, February 1-5, 2021, pages 1320–1325, 2021. IEEE
EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms [link]Paper   doi   link   bibtex  
Post-Quantum Cryptography: Challenges and Opportunities for Robust and Secure HW Design. Bellizia, D.; Mrabet, N. E.; Fournaris, A. P.; Pontié, S.; Regazzoni, F.; Standaert, F.; Tasso, É.; and Valea, E. In Dilillo, L.; Cassano, L.; and Papadimitriou, A., editor(s), 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021, Athens, Greece, October 6-8, 2021, pages 1–6, 2021. IEEE
Post-Quantum Cryptography: Challenges and Opportunities for Robust and Secure HW Design [link]Paper   doi   link   bibtex  
Extending Circuit Design Flow for Early Assessment of Fault Attack Vulnerabilities. Valencia, F.; Polian, I.; and Regazzoni, F. In Leporati, F.; Vitabile, S.; and Skavhaug, A., editor(s), 24th Euromicro Conference on Digital System Design, DSD 2021, Palermo, Spain, September 1-3, 2021, pages 385–388, 2021. IEEE
Extending Circuit Design Flow for Early Assessment of Fault Attack Vulnerabilities [link]Paper   doi   link   bibtex  
Security, Reliability and Test Aspects of the RISC-V Ecosystem. Abella, J.; Alcaide, S.; Anders, J.; Bas, F.; Becker, S.; Mulder, E. D.; Elhamawy, N.; Gürkaynak, F. K.; Handschuh, H.; Hernández, C.; Hutter, M.; Kosmidis, L.; Polian, I.; Sauer, M.; Wagner, S.; and Regazzoni, F. In 26th IEEE European Test Symposium, ETS 2021, Bruges, Belgium, May 24-28, 2021, pages 1–10, 2021. IEEE
Security, Reliability and Test Aspects of the RISC-V Ecosystem [link]Paper   doi   link   bibtex  
Rosita: Towards Automatic Elimination of Power-Analysis Leakage in Ciphers. Shelton, M. A.; Samwel, N.; Batina, L.; Regazzoni, F.; Wagner, M.; and Yarom, Y. In 28th Annual Network and Distributed System Security Symposium, NDSS 2021, virtually, February 21-25, 2021, 2021. The Internet Society
Rosita: Towards Automatic Elimination of Power-Analysis Leakage in Ciphers [link]Paper   link   bibtex  
Boolean Exponent Splitting. Tunstall, M.; Papachristodoulou, L.; and Papagiannopoulos, K. In di Vimercati, S. D. C.; and Samarati, P., editor(s), Proceedings of the 18th International Conference on Security and Cryptography, SECRYPT 2021, July 6-8, 2021, pages 321–332, 2021. SCITEPRESS
Boolean Exponent Splitting [link]Paper   doi   link   bibtex  
Constructive Side-Channel Analysis and Secure Design - 11th International Workshop, COSADE 2020, Lugano, Switzerland, April 1-3, 2020, Revised Selected Papers. Bertoni, G. M.; and Regazzoni, F., editors. Volume 12244, of Lecture Notes in Computer Science.Springer. 2021.
Constructive Side-Channel Analysis and Secure Design - 11th International Workshop, COSADE 2020, Lugano, Switzerland, April 1-3, 2020, Revised Selected Papers [link]Paper   doi   link   bibtex  
A High Speed Integrated Quantum Random Number Generator with on-Chip Real-Time Randomness Extraction. Regazzoni, F.; Amri, E.; Burri, S.; Rusca, D.; Zbinden, H.; and Charbon, E. CoRR, abs/2102.06238. 2021.
A High Speed Integrated Quantum Random Number Generator with on-Chip Real-Time Randomness Extraction [link]Paper   link   bibtex  
EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms. Pilato, C.; Böhm, S.; Brocheton, F.; Castrillón, J.; Cevasco, R.; Cima, V.; Cmar, R.; Diamantopoulos, D.; Ferrandi, F.; Martinovic, J.; Palermo, G.; Paolino, M.; Parodi, A.; Pittaluga, L.; Raho, D.; Regazzoni, F.; Slaninová, K.; and Hagleitner, C. CoRR, abs/2103.04185. 2021.
EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms [link]Paper   link   bibtex  
High-Level Synthesis of Security Properties via Software-Level Abstractions. Pilato, C.; and Regazzoni, F. CoRR, abs/2104.01446. 2021.
High-Level Synthesis of Security Properties via Software-Level Abstractions [link]Paper   link   bibtex  
Bitslice Masking and Improved Shuffling: How and When to Mix Them in Software?. Azouaoui, M.; Bronchain, O.; Grosso, V.; Papagiannopoulos, K.; and Standaert, F. IACR Cryptol. ePrint Arch.,951. 2021.
Bitslice Masking and Improved Shuffling: How and When to Mix Them in Software? [link]Paper   link   bibtex  
Blind Side-Channel SIFA. Azouaoui, M.; Papagiannopoulos, K.; and Zürner, D. IACR Cryptol. ePrint Arch.,685. 2021.
Blind Side-Channel SIFA [link]Paper   link   bibtex  
Reducing the Cost of Machine Learning Differential Attacks Using Bit Selection and aPartial ML-Distinguisher. Ebrahimi, A.; Regazzoni, F.; and Palmieri, P. IACR Cryptol. ePrint Arch.,1479. 2021.
Reducing the Cost of Machine Learning Differential Attacks Using Bit Selection and aPartial ML-Distinguisher [link]Paper   link   bibtex  
Exploring Parallelism to Improve the Performance of FrodoKEM in Hardware. Howe, J.; Martinoli, M.; Oswald, E.; and Regazzoni, F. IACR Cryptol. ePrint Arch.,155. 2021.
Exploring Parallelism to Improve the Performance of FrodoKEM in Hardware [link]Paper   link   bibtex  
  2020 (16)
Synthesis of Flexible Accelerators for Early Adoption of Ring-LWE Post-quantum Cryptography. Nejatollahi, H.; Valencia, F.; Banik, S.; Regazzoni, F.; Cammarota, R.; and Dutt, N. D. ACM Trans. Embed. Comput. Syst., 19(2): 11:1–11:17. 2020.
Synthesis of Flexible Accelerators for Early Adoption of Ring-LWE Post-quantum Cryptography [link]Paper   doi   link   bibtex  
Swap and Rotate: Lightweight Linear Layers for SPN-based Blockciphers. Banik, S.; Balli, F.; Regazzoni, F.; and Vaudenay, S. IACR Trans. Symmetric Cryptol., 2020(1): 185–232. 2020.
Swap and Rotate: Lightweight Linear Layers for SPN-based Blockciphers [link]Paper   doi   link   bibtex  
A secure, distributed and scalable infrastructure for remote generation and use of cryptographic keys. Bareato, C.; Palmieri, P.; Regazzoni, F.; and Venier, O. In 2nd Conference on Blockchain Research & Applications for Innovative Networks and Services, BRAINS 2020, Paris, France, September 28-30, 2020, pages 102–106, 2020. IEEE
A secure, distributed and scalable infrastructure for remote generation and use of cryptographic keys [link]Paper   doi   link   bibtex  
AHEC: End-to-end Compiler Framework for Privacy-preserving Machine Learning Acceleration. Chen, H.; Cammarota, R.; Valencia, F.; Regazzoni, F.; and Koushanfar, F. In 57th ACM/IEEE Design Automation Conference, DAC 2020, San Francisco, CA, USA, July 20-24, 2020, pages 1–6, 2020. IEEE
AHEC: End-to-end Compiler Framework for Privacy-preserving Machine Learning Acceleration [link]Paper   doi   link   bibtex  
Are Cloud FPGAs Really Vulnerable to Power Analysis Attacks?. Glamocanin, O.; Coulon, L.; Regazzoni, F.; and Stojilovic, M. In 2020 Design, Automation & Test in Europe Conference & Exhibition, DATE 2020, Grenoble, France, March 9-13, 2020, pages 1007–1010, 2020. IEEE
Are Cloud FPGAs Really Vulnerable to Power Analysis Attacks? [link]Paper   doi   link   bibtex  
Towards Secure Composition of Integrated Circuits and Electronic Systems: On the Role of EDA. Knechtel, J.; Kavun, E. B.; Regazzoni, F.; Heuser, A.; Chattopadhyay, A.; Mukhopadhyay, D.; Dey, S.; Fei, Y.; Belenky, Y.; Levi, I.; Güneysu, T.; Schaumont, P.; and Polian, I. In 2020 Design, Automation & Test in Europe Conference & Exhibition, DATE 2020, Grenoble, France, March 9-13, 2020, pages 508–513, 2020. IEEE
Towards Secure Composition of Integrated Circuits and Electronic Systems: On the Role of EDA [link]Paper   doi   link   bibtex  
Latest Trends in Hardware Security and Privacy. Natale, G. D.; Regazzoni, F.; Albanese, V.; Lhermet, F.; Loisel, Y.; Sensaoui, A.; and Pagliarini, S. In Dilillo, L.; Psarakis, M.; and Siddiqua, T., editor(s), IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pages 1–4, 2020. IEEE
Latest Trends in Hardware Security and Privacy [link]Paper   doi   link   bibtex  
Friet: An Authenticated Encryption Scheme with Built-in Fault Detection. Simon, T.; Batina, L.; Daemen, J.; Grosso, V.; Massolino, P. M. C.; Papagiannopoulos, K.; Regazzoni, F.; and Samwel, N. In Canteaut, A.; and Ishai, Y., editor(s), Advances in Cryptology - EUROCRYPT 2020 - 39th Annual International Conference on the Theory and Applications of Cryptographic Techniques, Zagreb, Croatia, May 10-14, 2020, Proceedings, Part I, volume 12105, of Lecture Notes in Computer Science, pages 581–611, 2020. Springer
Friet: An Authenticated Encryption Scheme with Built-in Fault Detection [link]Paper   doi   link   bibtex  
Built-in Self-Evaluation of First-Order Power Side-Channel Leakage for FPGAs. Glamocanin, O.; Coulon, L.; Regazzoni, F.; and Stojilovic, M. In Neuendorffer, S.; and Shannon, L., editor(s), FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Seaside, CA, USA, February 23-25, 2020, pages 204–210, 2020. ACM
Built-in Self-Evaluation of First-Order Power Side-Channel Leakage for FPGAs [link]Paper   doi   link   bibtex  
Side Channel Attacks vs Approximate Computing. Regazzoni, F.; and Polian, I. In Mohsenin, T.; Zhao, W.; Chen, Y.; and Mutlu, O., editor(s), GLSVLSI '20: Great Lakes Symposium on VLSI 2020, Virtual Event, China, September 7-9, 2020, pages 321–326, 2020. ACM
Side Channel Attacks vs Approximate Computing [link]Paper   doi   link   bibtex  
Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk-. Regazzoni, F.; Bhasin, S.; Alipour, A.; Alshaer, I.; Aydin, F.; Aysu, A.; Beroulle, V.; Natale, G. D.; Franzon, P. D.; Hély, D.; Homma, N.; Ito, A.; Jap, D.; Kashyap, P.; Polian, I.; Potluri, S.; Ueno, R.; Vatajelu, E. I.; and Yli-Mäyry, V. In IEEE/ACM International Conference On Computer Aided Design, ICCAD 2020, San Diego, CA, USA, November 2-5, 2020, pages 141:1–141:6, 2020. IEEE
Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk- [link]Paper   doi   link   bibtex  
On the Worst-Case Side-Channel Security of ECC Point Randomization in Embedded Devices. Azouaoui, M.; Durvaux, F.; Poussier, R.; Standaert, F.; Papagiannopoulos, K.; and Verneuil, V. In Bhargavan, K.; Oswald, E.; and Prabhakaran, M., editor(s), Progress in Cryptology - INDOCRYPT 2020 - 21st International Conference on Cryptology in India, Bangalore, India, December 13-16, 2020, Proceedings, volume 12578, of Lecture Notes in Computer Science, pages 205–227, 2020. Springer
On the Worst-Case Side-Channel Security of ECC Point Randomization in Embedded Devices [link]Paper   doi   link   bibtex  
Towards Secure Composition of Integrated Circuits and Electronic Systems: On the Role of EDA. Knechtel, J.; Kavun, E. B.; Regazzoni, F.; Heuser, A.; Chattopadhyay, A.; Mukhopadhyay, D.; Dey, S.; Fei, Y.; Belenky, Y.; Levi, I.; Güneysu, T.; Schaumont, P.; and Polian, I. CoRR, abs/2001.09672. 2020.
Towards Secure Composition of Integrated Circuits and Electronic Systems: On the Role of EDA [link]Paper   link   bibtex  
On the Worst-Case Side-Channel Security of ECC Point Randomization in Embedded Devices. Azouaoui, M.; Durvaux, F.; Poussier, R.; Standaert, F.; Papagiannopoulos, K.; and Verneuil, V. IACR Cryptol. ePrint Arch.,1368. 2020.
On the Worst-Case Side-Channel Security of ECC Point Randomization in Embedded Devices [link]Paper   link   bibtex  
An Instruction Set Extension to Support Software-Based Masking. Großschädl, J.; Marshall, B.; Page, D.; Pham, T. H.; and Regazzoni, F. IACR Cryptol. ePrint Arch.,773. 2020.
An Instruction Set Extension to Support Software-Based Masking [link]Paper   link   bibtex  
Friet: An Authenticated Encryption Scheme with Built-in Fault Detection. Simon, T.; Batina, L.; Daemen, J.; Grosso, V.; Massolino, P. M. C.; Papagiannopoulos, K.; Regazzoni, F.; and Samwel, N. IACR Cryptol. ePrint Arch.,425. 2020.
Friet: An Authenticated Encryption Scheme with Built-in Fault Detection [link]Paper   link   bibtex  
  2019 (23)
Post-Quantum Lattice-Based Cryptography Implementations: A Survey. Nejatollahi, H.; Dutt, N. D.; Ray, S.; Regazzoni, F.; Banerjee, I.; and Cammarota, R. ACM Comput. Surv., 51(6): 129:1–129:41. 2019.
Post-Quantum Lattice-Based Cryptography Implementations: A Survey [link]Paper   doi   link   bibtex  
Forensic Analysis of Water Damaged Mobile Devices. Fukami, A.; and Nishimura, K. Digit. Investig., 29 Supplement: S71–S79. 2019.
Forensic Analysis of Water Damaged Mobile Devices [link]Paper   doi   link   bibtex  
Guest Editors' Introduction. Regazzoni, F.; Canedo, A.; and Faruque, M. A. A. IEEE Embed. Syst. Lett., 11(4): 101. 2019.
Guest Editors' Introduction [link]Paper   doi   link   bibtex  
Compact circuits for combined AES encryption/decryption. Banik, S.; Bogdanov, A.; and Regazzoni, F. J. Cryptogr. Eng., 9(1): 69–83. 2019.
Compact circuits for combined AES encryption/decryption [link]Paper   doi   link   bibtex  
TaintHLS: High-Level Synthesis for Dynamic Information Flow Tracking. Pilato, C.; Wu, K.; Garg, S.; Karri, R.; and Regazzoni, F. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38(5): 798–808. 2019.
TaintHLS: High-Level Synthesis for Dynamic Information Flow Tracking [link]Paper   doi   link   bibtex  
Practical Evaluation of Protected Residue Number System Scalar Multiplication. Papachristodoulou, L.; Fournaris, A. P.; Papagiannopoulos, K.; and Batina, L. IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019(1): 259–282. 2019.
Practical Evaluation of Protected Residue Number System Scalar Multiplication [link]Paper   doi   link   bibtex  
The Curse of Class Imbalance and Conflicting Metrics with Machine Learning for Side-channel Evaluations. Picek, S.; Heuser, A.; Jovic, A.; Bhasin, S.; and Regazzoni, F. IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019(1): 209–237. 2019.
The Curse of Class Imbalance and Conflicting Metrics with Machine Learning for Side-channel Evaluations [link]Paper   doi   link   bibtex  
Black-Hat High-Level Synthesis: Myth or Reality?. Pilato, C.; Basu, K.; Regazzoni, F.; and Karri, R. IEEE Trans. Very Large Scale Integr. Syst., 27(4): 913–926. 2019.
Black-Hat High-Level Synthesis: Myth or Reality? [link]Paper   doi   link   bibtex  
Location, Location, Location: Revisiting Modeling and Exploitation for Location-Based Side Channel Leakages. Andrikos, C.; Batina, L.; Chmielewski, L.; Lerman, L.; Mavroudis, V.; Papagiannopoulos, K.; Perin, G.; Rassias, G.; and Sonnino, A. In Galbraith, S. D.; and Moriai, S., editor(s), Advances in Cryptology - ASIACRYPT 2019 - 25th International Conference on the Theory and Application of Cryptology and Information Security, Kobe, Japan, December 8-12, 2019, Proceedings, Part III, volume 11923, of Lecture Notes in Computer Science, pages 285–314, 2019. Springer
Location, Location, Location: Revisiting Modeling and Exploitation for Location-Based Side Channel Leakages [link]Paper   doi   link   bibtex  
ASHES 2019: 3rd Workshop on Attacks and Solutions in Hardware Security. Chang, C.; Holcomb, D. E.; Regazzoni, F.; Rührmair, U.; and Schaumont, P. In Cavallaro, L.; Kinder, J.; Wang, X.; and Katz, J., editor(s), Proceedings of the 2019 ACM SIGSAC Conference on Computer and Communications Security, CCS 2019, London, UK, November 11-15, 2019, pages 2709–2710, 2019. ACM
ASHES 2019: 3rd Workshop on Attacks and Solutions in Hardware Security [link]Paper   doi   link   bibtex  
CERBERO: Cross-layer modEl-based fRamework for multi-oBjective dEsign of reconfigurable systems in unceRtain hybRid envirOnments: Invited paper: CERBERO teams from UniSS, UniCA, IBM Research, TASE, INSA-Rennes, UPM, USI, Abinsula, AmbieSense, TNO, S&T, CRF. Palumbo, F.; Fanni, T.; Sau, C.; Pulina, L.; Raffo, L.; Masin, M.; Shindin, E.; de Rojas, P. S.; Desnos, K.; Pelcat, M.; Rodríguez, A.; Juárez, E.; Regazzoni, F.; Meloni, G.; Zedda, K.; Myrhaug, H.; Kaliciak, L.; Andriaanse, J.; de Olivieria Filho, J.; Muñoz, P.; and Toffetti, A. In Palumbo, F.; Becchi, M.; Schulz, M.; and Sato, K., editor(s), Proceedings of the 16th ACM International Conference on Computing Frontiers, CF 2019, Alghero, Italy, April 30 - May 2, 2019, pages 320–325, 2019. ACM
CERBERO: Cross-layer modEl-based fRamework for multi-oBjective dEsign of reconfigurable systems in unceRtain hybRid envirOnments: Invited paper: CERBERO teams from UniSS, UniCA, IBM Research, TASE, INSA-Rennes, UPM, USI, Abinsula, AmbieSense, TNO, S&T, CRF [link]Paper   doi   link   bibtex  
High-Level Synthesis of Benevolent Trojans. Pilato, C.; Basu, K.; Shayan, M.; Regazzoni, F.; and Karri, R. In Teich, J.; and Fummi, F., editor(s), Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Florence, Italy, March 25-29, 2019, pages 1124–1129, 2019. IEEE
High-Level Synthesis of Benevolent Trojans [link]Paper   doi   link   bibtex  
Security in Autonomous Systems. Katzenbeisser, S.; Polian, I.; Regazzoni, F.; and Stöttinger, M. In 24th IEEE European Test Symposium, ETS 2019, Baden-Baden, Germany, May 27-31, 2019, pages 1–8, 2019. IEEE
Security in Autonomous Systems [link]Paper   doi   link   bibtex  
PlaidML-HE: Acceleration of Deep Learning Kernels to Compute on Encrypted Data. Chen, H.; Cammarota, R.; Valencia, F.; and Regazzoni, F. In 37th IEEE International Conference on Computer Design, ICCD 2019, Abu Dhabi, United Arab Emirates, November 17-20, 2019, pages 333–336, 2019. IEEE
PlaidML-HE: Acceleration of Deep Learning Kernels to Compute on Encrypted Data [link]Paper   doi   link   bibtex  
Fault Attack Countermeasures for Error Samplers in Lattice-Based Cryptography. Howe, J.; Khalid, A.; Martinoli, M.; Regazzoni, F.; and Oswald, E. In IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019, pages 1–5, 2019. IEEE
Fault Attack Countermeasures for Error Samplers in Lattice-Based Cryptography [link]Paper   doi   link   bibtex  
Elicitation of technical requirements in large research projects: the CERBERO approach. Masin, M.; Palumbo, F.; Adriaanse, J.; Myrhaug, H.; Regazzoni, F.; Sanchez, M.; and Zedda, K. In Hung, C.; and Papadopoulos, G. A., editor(s), Proceedings of the 34th ACM/SIGAPP Symposium on Applied Computing, SAC 2019, Limassol, Cyprus, April 8-12, 2019, pages 1629–1632, 2019. ACM
Elicitation of technical requirements in large research projects: the CERBERO approach [link]Paper   doi   link   bibtex  
Fault Sensitivity Analysis of Lattice-Based Post-Quantum Cryptographic Components. Valencia, F.; Polian, I.; and Regazzoni, F. In Pnevmatikatos, D. N.; Pelcat, M.; and Jung, M., editor(s), Embedded Computer Systems: Architectures, Modeling, and Simulation - 19th International Conference, SAMOS 2019, Samos, Greece, July 7-11, 2019, Proceedings, volume 11733, of Lecture Notes in Computer Science, pages 107–123, 2019. Springer
Fault Sensitivity Analysis of Lattice-Based Post-Quantum Cryptographic Components [link]Paper   doi   link   bibtex  
Rosita: Towards Automatic Elimination of Power-Analysis Leakage in Ciphers. Shelton, M. A.; Samwel, N.; Batina, L.; Regazzoni, F.; Wagner, M.; and Yarom, Y. CoRR, abs/1912.05183. 2019.
Rosita: Towards Automatic Elimination of Power-Analysis Leakage in Ciphers [link]Paper   link   bibtex  
Secure Composition for Hardware Systems (Dagstuhl Seminar 19301). Arora, D.; Polian, I.; Regazzoni, F.; and Schaumont, P. Dagstuhl Reports, 9(7): 94–116. 2019.
Secure Composition for Hardware Systems (Dagstuhl Seminar 19301) [link]Paper   doi   link   bibtex  
Location, location, location: Revisiting modeling and exploitation for location-based side channel leakages. Andrikos, C.; Batina, L.; Chmielewski, L.; Lerman, L.; Mavroudis, V.; Papagiannopoulos, K.; Perin, G.; Rassias, G.; and Sonnino, A. IACR Cryptol. ePrint Arch.,230. 2019.
Location, location, location: Revisiting modeling and exploitation for location-based side channel leakages [link]Paper   link   bibtex  
Swap and Rotate: Lightweight linear layers for SPN-based blockciphers. Banik, S.; Balli, F.; Regazzoni, F.; and Vaudenay, S. IACR Cryptol. ePrint Arch.,1212. 2019.
Swap and Rotate: Lightweight linear layers for SPN-based blockciphers [link]Paper   link   bibtex  
Fault Attack Countermeasures for Error Samplers in Lattice-Based Cryptography. Howe, J.; Khalid, A.; Martinoli, M.; Regazzoni, F.; and Oswald, E. IACR Cryptol. ePrint Arch.,206. 2019.
Fault Attack Countermeasures for Error Samplers in Lattice-Based Cryptography [link]Paper   link   bibtex  
Rosita: Towards Automatic Elimination of Power-Analysis Leakage in Ciphers. Shelton, M. A.; Samwel, N.; Batina, L.; Regazzoni, F.; Wagner, M.; and Yarom, Y. IACR Cryptol. ePrint Arch.,1445. 2019.
Rosita: Towards Automatic Elimination of Power-Analysis Leakage in Ciphers [link]Paper   link   bibtex  
  2018 (26)
Securing Hardware Accelerators: A New Challenge for High-Level Synthesis. Pilato, C.; Garg, S.; Wu, K.; Karri, R.; and Regazzoni, F. IEEE Embed. Syst. Lett., 10(3): 77–80. 2018.
Securing Hardware Accelerators: A New Challenge for High-Level Synthesis [link]Paper   doi   link   bibtex  
Customized Instructions for Protection Against Memory Integrity Attacks. Roy, D. B.; Alam, M.; Bhattacharya, S.; Govindan, V.; Regazzoni, F.; Chakraborty, R. S.; and Mukhopadhyay, D. IEEE Embed. Syst. Lett., 10(3): 91–94. 2018.
Customized Instructions for Protection Against Memory Integrity Attacks [link]Paper   doi   link   bibtex  
On Practical Discrete Gaussian Samplers for Lattice-Based Cryptography. Howe, J.; Khalid, A.; Rafferty, C.; Regazzoni, F.; and O'Neill, M. IEEE Trans. Computers, 67(3): 322–334. 2018.
On Practical Discrete Gaussian Samplers for Lattice-Based Cryptography [link]Paper   doi   link   bibtex  
Low Randomness Masking and Shuffling: An Evaluation Using Mutual Information. Papagiannopoulos, K. IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018(3): 524–546. 2018.
Low Randomness Masking and Shuffling: An Evaluation Using Mutual Information [link]Paper   doi   link   bibtex  
Towards Low Energy Stream Ciphers. Banik, S.; Mikhalev, V.; Armknecht, F.; Isobe, T.; Meier, W.; Bogdanov, A.; Watanabe, Y.; and Regazzoni, F. IACR Trans. Symmetric Cryptol., 2018(2): 1–19. 2018.
Towards Low Energy Stream Ciphers [link]Paper   doi   link   bibtex  
SCA-Resistance for AES: How Cheap Can We Go?. Chaves, R.; Chmielewski, L.; Regazzoni, F.; and Batina, L. In Joux, A.; Nitaj, A.; and Rachidi, T., editor(s), Progress in Cryptology - AFRICACRYPT 2018 - 10th International Conference on Cryptology in Africa, Marrakesh, Morocco, May 7-9, 2018, Proceedings, volume 10831, of Lecture Notes in Computer Science, pages 107–123, 2018. Springer
SCA-Resistance for AES: How Cheap Can We Go? [link]Paper   doi   link   bibtex  
ASHES 2018- Workshop on Attacks and Solutions in Hardware Security. Chang, C.; Guajardo, J.; Holcomb, D. E.; Regazzoni, F.; and Rührmair, U. In Lie, D.; Mannan, M.; Backes, M.; and Wang, X., editor(s), Proceedings of the 2018 ACM SIGSAC Conference on Computer and Communications Security, CCS 2018, Toronto, ON, Canada, October 15-19, 2018, pages 2168–2170, 2018. ACM
ASHES 2018- Workshop on Attacks and Solutions in Hardware Security [link]Paper   doi   link   bibtex  
Vectorizing Higher-Order Masking. Grégoire, B.; Papagiannopoulos, K.; Schwabe, P.; and Stoffelen, K. In Fan, J.; and Gierlichs, B., editor(s), Constructive Side-Channel Analysis and Secure Design - 9th International Workshop, COSADE 2018, Singapore, April 23-24, 2018, Proceedings, volume 10815, of Lecture Notes in Computer Science, pages 23–43, 2018. Springer
Vectorizing Higher-Order Masking [link]Paper   doi   link   bibtex  
TAO: techniques for algorithm-level obfuscation during high-level synthesis. Pilato, C.; Regazzoni, F.; Karri, R.; and Garg, S. In Proceedings of the 55th Annual Design Automation Conference, DAC 2018, San Francisco, CA, USA, June 24-29, 2018, pages 155:1–155:6, 2018. ACM
TAO: techniques for algorithm-level obfuscation during high-level synthesis [link]Paper   doi   link   bibtex  
Rethinking Secure FPGAs: Towards a Cryptography-Friendly Configurable Cell Architecture and Its Automated Design Flow. Mentens, N.; Charbon, E.; and Regazzoni, F. In 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2018, Boulder, CO, USA, April 29 - May 1, 2018, pages 215, 2018. IEEE Computer Society
Rethinking Secure FPGAs: Towards a Cryptography-Friendly Configurable Cell Architecture and Its Automated Design Flow [link]Paper   doi   link   bibtex  
Physical Protection of Lattice-Based Cryptography: Challenges and Solutions. Khalid, A.; Oder, T.; Valencia, F.; O'Neill, M.; Güneysu, T.; and Regazzoni, F. In Chen, D.; Homayoun, H.; and Taskin, B., editor(s), Proceedings of the 2018 on Great Lakes Symposium on VLSI, GLSVLSI 2018, Chicago, IL, USA, May 23-25, 2018, pages 365–370, 2018. ACM
Physical Protection of Lattice-Based Cryptography: Challenges and Solutions [link]Paper   doi   link   bibtex  
Exploring the Vulnerability of R-LWE Encryption to Fault Attacks. Valencia, F.; Oder, T.; Güneysu, T.; and Regazzoni, F. In Goodacre, J.; Luján, M.; Agosta, G.; Barenghi, A.; Koren, I.; and Pelosi, G., editor(s), Proceedings of the Fifth Workshop on Cryptography and Security in Computing Systems, CS2 2018, Manchester, United Kingdom, January 24, 2018, pages 7–12, 2018. ACM
Exploring the Vulnerability of R-LWE Encryption to Fault Attacks [link]Paper   doi   link   bibtex  
Inverse gating for low energy encryption. Banik, S.; Bogdanov, A.; Regazzoni, F.; Isobe, T.; Hiwatari, H.; and Akishita, T. In 2018 IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2018, Washington, DC, USA, April 30 - May 4, 2018, pages 173–176, 2018. IEEE Computer Society
Inverse gating for low energy encryption [link]Paper   doi   link   bibtex  
Security: the dark side of approximate computing?. Regazzoni, F.; Alippi, C.; and Polian, I. In Bahar, I., editor(s), Proceedings of the International Conference on Computer-Aided Design, ICCAD 2018, San Diego, CA, USA, November 05-08, 2018, pages 44, 2018. ACM
Security: the dark side of approximate computing? [link]Paper   doi   link   bibtex  
Compact, Scalable, and Efficient Discrete Gaussian Samplers for Lattice-Based Cryptography. Khalid, A.; Howe, J.; Rafferty, C.; Regazzoni, F.; and O'Neill, M. In IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy, pages 1–5, 2018. IEEE
Compact, Scalable, and Efficient Discrete Gaussian Samplers for Lattice-Based Cryptography [link]Paper   doi   link   bibtex  
Session details: Security threats caused by novel technologies. Najm, Z.; Flórez, M. J. S.; and Regazzoni, F. In Mudge, T. N.; and Pnevmatikatos, D. N., editor(s), Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, Pythagorion, Greece, July 15-19, 2018, 2018. ACM
Session details: Security threats caused by novel technologies [link]Paper   link   bibtex  
Quantum era challenges for classical computers. Regazzoni, F.; Fowler, A. G.; and Polian, I. In Mudge, T. N.; and Pnevmatikatos, D. N., editor(s), Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, Pythagorion, Greece, July 15-19, 2018, pages 173–178, 2018. ACM
Quantum era challenges for classical computers [link]Paper   doi   link   bibtex  
Lightweight Circuits with Shift and Swap. Banik, S.; Regazzoni, F.; and Vaudenay, S. IACR Cryptol. ePrint Arch.,1114. 2018.
Lightweight Circuits with Shift and Swap [link]Paper   link   bibtex  
Vectorizing Higher-Order Masking. Grégoire, B.; Papagiannopoulos, K.; Schwabe, P.; and Stoffelen, K. IACR Cryptol. ePrint Arch.,173. 2018.
Vectorizing Higher-Order Masking [link]Paper   link   bibtex  
Compact, Scalable, and Efficient Discrete Gaussian Samplers for Lattice-Based Cryptography. Khalid, A.; Howe, J.; Rafferty, C.; Regazzoni, F.; and O'Neill, M. IACR Cryptol. ePrint Arch.,265. 2018.
Compact, Scalable, and Efficient Discrete Gaussian Samplers for Lattice-Based Cryptography [link]Paper   link   bibtex  
Rethinking Secure FPGAs: Towards a Cryptography-friendly Configurable Cell Architecture and its Automated Design Flow. Mentens, N.; Charbon, E.; and Regazzoni, F. IACR Cryptol. ePrint Arch.,724. 2018.
Rethinking Secure FPGAs: Towards a Cryptography-friendly Configurable Cell Architecture and its Automated Design Flow [link]Paper   link   bibtex  
Low Randomness Masking and Shuffling: An Evaluation Using Mutual Information. Papagiannopoulos, K. IACR Cryptol. ePrint Arch.,825. 2018.
Low Randomness Masking and Shuffling: An Evaluation Using Mutual Information [link]Paper   link   bibtex  
When Theory Meets Practice: A Framework for Robust Profiled Side-channel Analysis. Picek, S.; Heuser, A.; Alippi, C.; and Regazzoni, F. IACR Cryptol. ePrint Arch.,1123. 2018.
When Theory Meets Practice: A Framework for Robust Profiled Side-channel Analysis [link]Paper   link   bibtex  
The Curse of Class Imbalance and Conflicting Metrics with Machine Learning for Side-channel Evaluations. Picek, S.; Heuser, A.; Jovic, A.; Bhasin, S.; and Regazzoni, F. IACR Cryptol. ePrint Arch.,476. 2018.
The Curse of Class Imbalance and Conflicting Metrics with Machine Learning for Side-channel Evaluations [link]Paper   link   bibtex  
Towards Lightweight Cryptographic Primitives with Built-in Fault-Detection. Simon, T.; Batina, L.; Daemen, J.; Grosso, V.; Massolino, P. M. C.; Papagiannopoulos, K.; Regazzoni, F.; and Samwel, N. IACR Cryptol. ePrint Arch.,729. 2018.
Towards Lightweight Cryptographic Primitives with Built-in Fault-Detection [link]Paper   link   bibtex  
Boolean Exponent Splitting. Tunstall, M.; Papachristodoulou, L.; and Papagiannopoulos, K. IACR Cryptol. ePrint Arch.,1226. 2018.
Boolean Exponent Splitting [link]Paper   link   bibtex  
  2017 (18)
Improving the reliability of chip-off forensic analysis of NAND flash memory devices. Fukami, A.; Ghose, S.; Luo, Y.; Cai, Y.; and Mutlu, O. Digit. Investig., 20 Supplement: S1–S11. 2017.
Improving the reliability of chip-off forensic analysis of NAND flash memory devices [link]Paper   doi   link   bibtex  
NAND Flash Memory Forensic Analysis and the Growing Challenge of Bit Errors. van Zandwijk, J. P.; and Fukami, A. IEEE Secur. Priv., 15(6): 82–87. 2017.
NAND Flash Memory Forensic Analysis and the Growing Challenge of Bit Errors [link]Paper   doi   link   bibtex  
Securing the hardware of cyber-physical systems. Regazzoni, F.; and Polian, I. In 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017, Chiba, Japan, January 16-19, 2017, pages 194–199, 2017. IEEE
Securing the hardware of cyber-physical systems [link]Paper   doi   link   bibtex  
Instruction Duplication: Leaky and Not Too Fault-Tolerant!. Cojocar, L.; Papagiannopoulos, K.; and Timmers, N. In Eisenbarth, T.; and Teglia, Y., editor(s), Smart Card Research and Advanced Applications - 16th International Conference, CARDIS 2017, Lugano, Switzerland, November 13-15, 2017, Revised Selected Papers, volume 10728, of Lecture Notes in Computer Science, pages 160–179, 2017. Springer
Instruction Duplication: Leaky and Not Too Fault-Tolerant! [link]Paper   doi   link   bibtex  
Efficient arithmetic for lattice-based cryptography: special session paper. O'Sullivan, E.; and Regazzoni, F. In Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion, CODES+ISSS 2017, Seoul, Republic of Korea, October 15-20, 2017, pages 7:1–7:3, 2017. ACM
Efficient arithmetic for lattice-based cryptography: special session paper [link]Paper   doi   link   bibtex  
Mind the Gap: Towards Secure 1st-Order Masking in Software. Papagiannopoulos, K.; and Veshchikov, N. In Guilley, S., editor(s), Constructive Side-Channel Analysis and Secure Design - 8th International Workshop, COSADE 2017, Paris, France, April 13-14, 2017, Revised Selected Papers, volume 10348, of Lecture Notes in Computer Science, pages 282–297, 2017. Springer
Mind the Gap: Towards Secure 1st-Order Masking in Software [link]Paper   doi   link   bibtex  
Side-Channel Based Intrusion Detection for Industrial Control Systems. Aubel, P. V.; Papagiannopoulos, K.; Chmielewski, L.; and Doerr, C. In D'Agostino, G.; and Scala, A., editor(s), Critical Information Infrastructures Security - 12th International Conference, CRITIS 2017, Lucca, Italy, October 8-13, 2017, Revised Selected Papers, volume 10707, of Lecture Notes in Computer Science, pages 207–224, 2017. Springer
Side-Channel Based Intrusion Detection for Industrial Control Systems [link]Paper   doi   link   bibtex  
Cross-layer design of reconfigurable cyber-physical systems. Masin, M.; Palumbo, F.; Myrhaug, H.; de Oliveira Filho, J. A.; Pastena, M.; Pelcat, M.; Raffo, L.; Regazzoni, F.; Sanchez, A. A.; Toffetti, A.; de la Torre, E.; and Zedda, K. In Atienza, D.; and Natale, G. D., editor(s), Design, Automation & Test in Europe Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017, pages 740–745, 2017. IEEE
Cross-layer design of reconfigurable cyber-physical systems [link]Paper   doi   link   bibtex  
Counteracting malicious faults in cryptographic circuits. Polian, I.; and Regazzoni, F. In 22nd IEEE European Test Symposium, ETS 2017, Limassol, Cyprus, May 22-26, 2017, pages 1–10, 2017. IEEE
Counteracting malicious faults in cryptographic circuits [link]Paper   doi   link   bibtex  
Efficient configurations for block ciphers with unified ENC/DEC paths. Banik, S.; Bogdanov, A.; and Regazzoni, F. In 2017 IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2017, McLean, VA, USA, May 1-5, 2017, pages 41–46, 2017. IEEE Computer Society
Efficient configurations for block ciphers with unified ENC/DEC paths [link]Paper   doi   link   bibtex  
Location-based leakages: New directions in modeling and exploiting. Andrikos, C.; Rassias, G.; Lerman, L.; Papagiannopoulos, K.; and Batina, L. In Patt, Y. N.; and Nandy, S. K., editor(s), 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2017, Pythagorion, Greece, July 17-20, 2017, pages 246–252, 2017. IEEE
Location-based leakages: New directions in modeling and exploiting [link]Paper   doi   link   bibtex  
Special session on architectures and design tools for secure embedded systems. Regazzoni, F. In Patt, Y. N.; and Nandy, S. K., editor(s), 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2017, Pythagorion, Greece, July 17-20, 2017, pages 245, 2017. IEEE
Special session on architectures and design tools for secure embedded systems [link]Paper   doi   link   bibtex  
The design space of the number theoretic transform: A survey. Valencia, F.; Khalid, A.; O'Sullivan, E.; and Regazzoni, F. In Patt, Y. N.; and Nandy, S. K., editor(s), 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2017, Pythagorion, Greece, July 17-20, 2017, pages 273–277, 2017. IEEE
The design space of the number theoretic transform: A survey [link]Paper   doi   link   bibtex  
Introduction to hardware-oriented security for MPSoCs. Polian, I.; Regazzoni, F.; and Sepúlveda, J. In Alioto, M.; Li, H. H.; Becker, J.; Schlichtmann, U.; and Sridhar, R., editor(s), 30th IEEE International System-on-Chip Conference, SOCC 2017, Munich, Germany, September 5-8, 2017, pages 102–107, 2017. IEEE
Introduction to hardware-oriented security for MPSoCs [link]Paper   doi   link   bibtex  
Side-channel based intrusion detection for industrial control systems. Aubel, P. V.; Papagiannopoulos, K.; Chmielewski, L.; and Doerr, C. CoRR, abs/1712.05745. 2017.
Side-channel based intrusion detection for industrial control systems [link]Paper   link   bibtex  
An Investigation of Sources of Randomness Within Discrete Gaussian Sampling. Brannigan, S.; Smyth, N.; Oder, T.; Valencia, F.; O'Sullivan, E.; Güneysu, T.; and Regazzoni, F. IACR Cryptol. ePrint Arch.,298. 2017.
An Investigation of Sources of Randomness Within Discrete Gaussian Sampling [link]Paper   link   bibtex  
Instruction Duplication: Leaky and Not Too Fault-Tolerant!. Cojocar, L.; Papagiannopoulos, K.; and Timmers, N. IACR Cryptol. ePrint Arch.,1082. 2017.
Instruction Duplication: Leaky and Not Too Fault-Tolerant! [link]Paper   link   bibtex  
Mind the Gap: Towards Secure 1st-order Masking in Software. Papagiannopoulos, K.; and Veshchikov, N. IACR Cryptol. ePrint Arch.,345. 2017.
Mind the Gap: Towards Secure 1st-order Masking in Software [link]Paper   link   bibtex  
  2016 (15)
Embedded systems education: job market expectations. Sami, M.; Malek, M.; Bondi, U.; and Regazzoni, F. SIGBED Rev., 14(1): 22–28. 2016.
Embedded systems education: job market expectations [link]Paper   doi   link   bibtex  
Adaptable AES implementation with power-gating support. Banik, S.; Bogdanov, A.; Fanni, T.; Sau, C.; Raffo, L.; Palumbo, F.; and Regazzoni, F. In Palermo, G.; and Feo, J., editor(s), Proceedings of the ACM International Conference on Computing Frontiers, CF'16, Como, Italy, May 16-19, 2016, pages 331–334, 2016. ACM
Adaptable AES implementation with power-gating support [link]Paper   doi   link   bibtex  
Secure architectures of future emerging cryptography \emphSAFEcrypto. O'Neill, M.; O'Sullivan, E.; McWilliams, G.; Saarinen, M. O.; Moore, C.; Khalid, A.; Howe, J.; Pino, R. D.; Abdalla, M.; Regazzoni, F.; Valencia, F.; Güneysu, T.; Oder, T.; Waller, A.; Jones, G.; Barnett, A.; Griffin, R.; Byrne, A.; Ammar, B.; and Lund, D. In Palermo, G.; and Feo, J., editor(s), Proceedings of the ACM International Conference on Computing Frontiers, CF'16, Como, Italy, May 16-19, 2016, pages 315–322, 2016. ACM
Secure architectures of future emerging cryptography \emphSAFEcrypto [link]Paper   doi   link   bibtex  
Standard lattices in hardware. Howe, J.; Moore, C.; O'Neill, M.; Regazzoni, F.; Güneysu, T.; and Beeden, K. In Proceedings of the 53rd Annual Design Automation Conference, DAC 2016, Austin, TX, USA, June 5-9, 2016, pages 162:1–162:6, 2016. ACM
Standard lattices in hardware [link]Paper   doi   link   bibtex  
Instruction Set Extensions for secure applications. Regazzoni, F.; and Ienne, P. In Fanucci, L.; and Teich, J., editor(s), 2016 Design, Automation & Test in Europe Conference & Exhibition, DATE 2016, Dresden, Germany, March 14-18, 2016, pages 1529–1534, 2016. IEEE
Instruction Set Extensions for secure applications [link]Paper   link   bibtex  
Evaluating the Impact of Environmental Factors on Physically Unclonable Functions (Abstract Only). Bellon, S.; Favi, C.; Malek, M.; Macchetti, M.; and Regazzoni, F. In Chen, D.; and Greene, J. W., editor(s), Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, USA, February 21-23, 2016, pages 279, 2016. ACM
Evaluating the Impact of Environmental Factors on Physically Unclonable Functions (Abstract Only) [link]Paper   doi   link   bibtex  
Round gating for low energy block ciphers. Banik, S.; Bogdanov, A.; Regazzoni, F.; Isobe, T.; Hiwatari, H.; and Akishita, T. In Robinson, W. H.; Bhunia, S.; and Kastner, R., editor(s), 2016 IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2016, McLean, VA, USA, May 3-5, 2016, pages 55–60, 2016. IEEE Computer Society
Round gating for low energy block ciphers [link]Paper   doi   link   bibtex  
Atomic-AES: A Compact Implementation of the AES Encryption/Decryption Core. Banik, S.; Bogdanov, A.; and Regazzoni, F. In Dunkelman, O.; and Sanadhya, S. K., editor(s), Progress in Cryptology - INDOCRYPT 2016 - 17th International Conference on Cryptology in India, Kolkata, India, December 11-14, 2016, Proceedings, volume 10095, of Lecture Notes in Computer Science, pages 173–190, 2016.
Atomic-AES: A Compact Implementation of the AES Encryption/Decryption Core [link]Paper   doi   link   bibtex  
Lattice-based cryptography: From reconfigurable hardware to ASIC. Oder, T.; Güneysu, T.; Valencia, F.; Khalid, A.; O'Neill, M.; and Regazzoni, F. In International Symposium on Integrated Circuits, ISIC 2016, Singapore, December 12-14, 2016, pages 1–4, 2016. IEEE
Lattice-based cryptography: From reconfigurable hardware to ASIC [link]Paper   doi   link   bibtex  
Bitsliced Masking and ARM: Friends or Foes?. de Groot, W.; Papagiannopoulos, K.; de la Piedra, A.; Schneider, E.; and Batina, L. In Bogdanov, A., editor(s), Lightweight Cryptography for Security and Privacy - 5th International Workshop, LightSec 2016, Aksaray, Turkey, September 21-22, 2016, Revised Selected Papers, volume 10098, of Lecture Notes in Computer Science, pages 91–109, 2016. Springer
Bitsliced Masking and ARM: Friends or Foes? [link]Paper   doi   link   bibtex  
Physical Attacks and Beyond. Regazzoni, F. In Avanzi, R.; and Heys, H. M., editor(s), Selected Areas in Cryptography - SAC 2016 - 23rd International Conference, St. John's, NL, Canada, August 10-12, 2016, Revised Selected Papers, volume 10532, of Lecture Notes in Computer Science, pages 3–13, 2016. Springer
Physical Attacks and Beyond [link]Paper   doi   link   bibtex  
Evaluating physically unclonable functions on a large set of FPGAs. Bellon, S.; Favi, C.; Malek, M.; Macchetti, M.; and Regazzoni, F. In Najjar, W. A.; and Gerstlauer, A., editor(s), International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS 2016, Agios Konstantinos, Samos Island, Greece, July 17-21, 2016, pages 188–195, 2016. IEEE
Evaluating physically unclonable functions on a large set of FPGAs [link]Paper   doi   link   bibtex  
Atomic-AES: A Compact Implementation of the AES Encryption/Decryption Core. Banik, S.; Bogdanov, A.; and Regazzoni, F. IACR Cryptol. ePrint Arch.,927. 2016.
Atomic-AES: A Compact Implementation of the AES Encryption/Decryption Core [link]Paper   link   bibtex  
Atomic-AES v 2.0. Banik, S.; Bogdanov, A.; and Regazzoni, F. IACR Cryptol. ePrint Arch.,1005. 2016.
Atomic-AES v 2.0 [link]Paper   link   bibtex  
Bitsliced Masking and ARM: Friends or Foes?. de Groot, W.; Papagiannopoulos, K.; de la Piedra, A.; Schneider, E.; and Batina, L. IACR Cryptol. ePrint Arch.,946. 2016.
Bitsliced Masking and ARM: Friends or Foes? [link]Paper   link   bibtex  
  2015 (14)
Automatic Application of Power Analysis Countermeasures. Bayrak, A. G.; Regazzoni, F.; Novo, D.; Brisk, P.; Standaert, F.; and Ienne, P. IEEE Trans. Computers, 64(2): 329–341. 2015.
Automatic Application of Power Analysis Countermeasures [link]Paper   doi   link   bibtex  
Midori: A Block Cipher for Low Energy. Banik, S.; Bogdanov, A.; Isobe, T.; Shibutani, K.; Hiwatari, H.; Akishita, T.; and Regazzoni, F. In Iwata, T.; and Cheon, J. H., editor(s), Advances in Cryptology - ASIACRYPT 2015 - 21st International Conference on the Theory and Application of Cryptology and Information Security, Auckland, New Zealand, November 29 - December 3, 2015, Proceedings, Part II, volume 9453, of Lecture Notes in Computer Science, pages 411–436, 2015. Springer
Midori: A Block Cipher for Low Energy [link]Paper   doi   link   bibtex  
Design methodologies for securing cyber-physical systems. Faruque, M. A. A.; Regazzoni, F.; and Pajic, M. In Nicolescu, G.; and Gerstlauer, A., editor(s), 2015 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2015, Amsterdam, Netherlands, October 4-9, 2015, pages 30–36, 2015. IEEE
Design methodologies for securing cyber-physical systems [link]Paper   doi   link   bibtex  
Fault attacks, injection techniques and tools for simulation. Piscitelli, R.; Bhasin, S.; and Regazzoni, F. In 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, DTIS 2015, Napoli, Italy, April 21-23, 2015, pages 1–6, 2015. IEEE
Fault attacks, injection techniques and tools for simulation [link]Paper   doi   link   bibtex  
Physical attacks, introduction and application to embedded processors. Regazzoni, F. In 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, DTIS 2015, Napoli, Italy, April 21-23, 2015, pages 1, 2015. IEEE
Physical attacks, introduction and application to embedded processors [link]Paper   doi   link   bibtex  
200 MS/s ADC implemented in a FPGA employing TDCs. Homulle, H.; Regazzoni, F.; and Charbon, E. In Constantinides, G. A.; and Chen, D., editor(s), Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, USA, February 22-24, 2015, pages 228–235, 2015. ACM
200 MS/s ADC implemented in a FPGA employing TDCs [link]Paper   doi   link   bibtex  
Simulation and analysis of negative-bias temperature instability aging on power analysis attacks. Guo, X.; Karimi, N.; Regazzoni, F.; Jin, C.; and Karri, R. In IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2015, Washington, DC, USA, 5-7 May, 2015, pages 124–129, 2015. IEEE Computer Society
Simulation and analysis of negative-bias temperature instability aging on power analysis attacks [link]Paper   doi   link   bibtex  
A survey on hardware trojan detection techniques. Bhasin, S.; and Regazzoni, F. In 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, Portugal, May 24-27, 2015, pages 2021–2024, 2015. IEEE
A survey on hardware trojan detection techniques [link]Paper   doi   link   bibtex  
Improving DPA resistance of S-boxes: How far can we go?. Ege, B.; Papagiannopoulos, K.; Batina, L.; and Picek, S. In 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, Portugal, May 24-27, 2015, pages 2013–2016, 2015. IEEE
Improving DPA resistance of S-boxes: How far can we go? [link]Paper   doi   link   bibtex  
Challenges in designing trustworthy cryptographic co-processors. Chaves, R.; Natale, G. D.; Batina, L.; Bhasin, S.; Ege, B.; Fournaris, A. P.; Mentens, N.; Picek, S.; Regazzoni, F.; Rozic, V.; Sklavos, N.; and Yang, B. In 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, Portugal, May 24-27, 2015, pages 2009–2012, 2015. IEEE
Challenges in designing trustworthy cryptographic co-processors [link]Paper   doi   link   bibtex  
Exploring the energy consumption of lightweight blockciphers in FPGA. Banik, S.; Bogdanov, A.; and Regazzoni, F. In Hübner, M.; Gokhale, M. B.; and Cumplido, R., editor(s), International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015, Riviera Maya, Mexico, December 7-9, 2015, pages 1–6, 2015. IEEE
Exploring the energy consumption of lightweight blockciphers in FPGA [link]Paper   doi   link   bibtex  
Exploring Energy Efficiency of Lightweight Block Ciphers. Banik, S.; Bogdanov, A.; and Regazzoni, F. In Dunkelman, O.; and Keliher, L., editor(s), Selected Areas in Cryptography - SAC 2015 - 22nd International Conference, Sackville, NB, Canada, August 12-14, 2015, Revised Selected Papers, volume 9566, of Lecture Notes in Computer Science, pages 178–194, 2015. Springer
Exploring Energy Efficiency of Lightweight Block Ciphers [link]Paper   doi   link   bibtex  
Midori: A Block Cipher for Low Energy (Extended Version). Banik, S.; Bogdanov, A.; Isobe, T.; Shibutani, K.; Hiwatari, H.; Akishita, T.; and Regazzoni, F. IACR Cryptol. ePrint Arch.,1142. 2015.
Midori: A Block Cipher for Low Energy (Extended Version) [link]Paper   link   bibtex  
Exploring Energy Efficiency of Lightweight Block Ciphers. Banik, S.; Bogdanov, A.; and Regazzoni, F. IACR Cryptol. ePrint Arch.,847. 2015.
Exploring Energy Efficiency of Lightweight Block Ciphers [link]Paper   link   bibtex  
  2014 (11)
Stealthy dopant-level hardware Trojans: extended version. Becker, G. T.; Regazzoni, F.; Paar, C.; and Burleson, W. P. J. Cryptogr. Eng., 4(1): 19–31. 2014.
Stealthy dopant-level hardware Trojans: extended version [link]Paper   doi   link   bibtex  
A Combined Design-Time/Test-Time Study of the Vulnerability of Sub-Threshold Devices to Low Voltage Fault Attacks. Barenghi, A.; Hocquet, C.; Bol, D.; Standaert, F.; Regazzoni, F.; and Koren, I. IEEE Trans. Emerg. Top. Comput., 2(2): 107–118. 2014.
A Combined Design-Time/Test-Time Study of the Vulnerability of Sub-Threshold Devices to Low Voltage Fault Attacks [link]Paper   doi   link   bibtex  
SPADs for quantum random number generators and beyond. Burri, S.; Stucki, D.; Maruyama, Y.; Bruschini, C.; Charbon, E.; and Regazzoni, F. In 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014, Singapore, January 20-23, 2014, pages 788–794, 2014. IEEE
SPADs for quantum random number generators and beyond [link]Paper   doi   link   bibtex  
Accelerating differential power analysis on heterogeneous systems. Amaral, J.; Regazzoni, F.; Tomás, P.; and Chaves, R. In Yu, T.; and Yang, S., editor(s), Proceedings of the 9th Workshop on Embedded Systems Security, WESS '14, New Delhi, India, October 17, 2014, pages 4:1–4:9, 2014. ACM
Accelerating differential power analysis on heterogeneous systems [link]Paper   doi   link   bibtex  
Embedded Systems Education: Job Market Expectations. Sami, M.; Malek, M.; Bondi, U.; and Regazzoni, F. In Törngren, M.; and Grimheden, M. E., editor(s), Proceedings of the Workshop on Embedded and Cyber-Physical Systems Education, WESE 2014, New Delhi, India, October 12-17, 2014, pages 3:1–3:5, 2014. ACM
Embedded Systems Education: Job Market Expectations [link]Paper   doi   link   bibtex  
THOR - The hardware onion router. Güneysu, T.; Regazzoni, F.; Sasdrich, P.; and Wójcik, M. In 24th International Conference on Field Programmable Logic and Applications, FPL 2014, Munich, Germany, 2-4 September, 2014, pages 1–4, 2014. IEEE
THOR - The hardware onion router [link]Paper   doi   link   bibtex  
Optimality and beyond: The case of 4×4 S-boxes. Picek, S.; Ege, B.; Papagiannopoulos, K.; Batina, L.; and Jakobovic, D. In 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, HOST 2014, Arlington, VA, USA, May 6-7, 2014, pages 80–83, 2014. IEEE Computer Society
Optimality and beyond: The case of 4×4 S-boxes [link]Paper   doi   link   bibtex  
Confused by Confusion: Systematic Evaluation of DPA Resistance of Various S-boxes. Picek, S.; Papagiannopoulos, K.; Ege, B.; Batina, L.; and Jakobovic, D. In Meier, W.; and Mukhopadhyay, D., editor(s), Progress in Cryptology - INDOCRYPT 2014 - 15th International Conference on Cryptology in India, New Delhi, India, December 14-17, 2014, Proceedings, volume 8885, of Lecture Notes in Computer Science, pages 374–390, 2014. Springer
Confused by Confusion: Systematic Evaluation of DPA Resistance of Various S-boxes [link]Paper   doi   link   bibtex  
Lightweight cryptography for constrained devices. Alippi, C.; Bogdanov, A.; and Regazzoni, F. In 2014 International Symposium on Integrated Circuits (ISIC), Singapore, December 10-12, 2014, pages 144–147, 2014. IEEE
Lightweight cryptography for constrained devices [link]Paper   doi   link   bibtex  
A Survey of Recent Results in FPGA Security and Intellectual Property Protection. Durvaux, F.; Kerckhof, S.; Regazzoni, F.; and Standaert, F. In Markantonakis, K.; and Mayes, K., editor(s), Secure Smart Embedded Devices, Platforms and Applications, pages 201–224. Springer, 2014.
A Survey of Recent Results in FPGA Security and Intellectual Property Protection [link]Paper   doi   link   bibtex  
Simulation-Time Security Margin Assessment against Power-Based Side Channel Attacks. Barenghi, A.; Pelosi, G.; and Regazzoni, F. IACR Cryptol. ePrint Arch.,307. 2014.
Simulation-Time Security Margin Assessment against Power-Based Side Channel Attacks [link]Paper   link   bibtex  
  2013 (6)
Sleuth: Automated Verification of Software Power Analysis Countermeasures. Bayrak, A. G.; Regazzoni, F.; Novo, D.; and Ienne, P. In Bertoni, G.; and Coron, J., editor(s), Cryptographic Hardware and Embedded Systems - CHES 2013 - 15th International Workshop, Santa Barbara, CA, USA, August 20-23, 2013. Proceedings, volume 8086, of Lecture Notes in Computer Science, pages 293–310, 2013. Springer
Sleuth: Automated Verification of Software Power Analysis Countermeasures [link]Paper   doi   link   bibtex  
Stealthy Dopant-Level Hardware Trojans. Becker, G. T.; Regazzoni, F.; Paar, C.; and Burleson, W. P. In Bertoni, G.; and Coron, J., editor(s), Cryptographic Hardware and Embedded Systems - CHES 2013 - 15th International Workshop, Santa Barbara, CA, USA, August 20-23, 2013. Proceedings, volume 8086, of Lecture Notes in Computer Science, pages 197–214, 2013. Springer
Stealthy Dopant-Level Hardware Trojans [link]Paper   doi   link   bibtex  
Single-photon image sensors. Charbon, E.; and Regazzoni, F. In The 50th Annual Design Automation Conference 2013, DAC '13, Austin, TX, USA, May 29 - June 07, 2013, pages 128:1–128:4, 2013. ACM
Single-photon image sensors [link]Paper   doi   link   bibtex  
An EDA-friendly protection scheme against side-channel attacks. Bayrak, A. G.; Velickovic, N.; Regazzoni, F.; Novo, D.; Brisk, P.; and Ienne, P. In Macii, E., editor(s), Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013, pages 410–415, 2013. EDA Consortium San Jose, CA, USA / ACM DL
An EDA-friendly protection scheme against side-channel attacks [link]Paper   doi   link   bibtex  
ALE: AES-Based Lightweight Authenticated Encryption. Bogdanov, A.; Mendel, F.; Regazzoni, F.; Rijmen, V.; and Tischhauser, E. In Moriai, S., editor(s), Fast Software Encryption - 20th International Workshop, FSE 2013, Singapore, March 11-13, 2013. Revised Selected Papers, volume 8424, of Lecture Notes in Computer Science, pages 447–466, 2013. Springer
ALE: AES-Based Lightweight Authenticated Encryption [link]Paper   doi   link   bibtex  
Speed and Size-Optimized Implementations of the PRESENT Cipher for Tiny AVR Devices. Papagiannopoulos, K.; and Verstegen, A. In Hutter, M.; and Schmidt, J., editor(s), Radio Frequency Identification - Security and Privacy Issues 9th International Workshop, RFIDsec 2013, Graz, Austria, July 9-11, 2013, Revised Selected Papers, volume 8262, of Lecture Notes in Computer Science, pages 161–175, 2013. Springer
Speed and Size-Optimized Implementations of the PRESENT Cipher for Tiny AVR Devices [link]Paper   doi   link   bibtex  
  2012 (7)
A Fast ULV Logic Synthesis Flow in Many-V\(_\mboxt\) CMOS Processes for Minimum Energy Under Timing Constraints. Bol, D.; Hocquet, C.; and Regazzoni, F. IEEE Trans. Circuits Syst. II Express Briefs, 59-II(12): 947–951. 2012.
A Fast ULV Logic Synthesis Flow in Many-V\(_\mboxt\) CMOS Processes for Minimum Energy Under Timing Constraints [link]Paper   doi   link   bibtex  
Compact Implementation and Performance Evaluation of Block Ciphers in ATtiny Devices. Eisenbarth, T.; Gong, Z.; Güneysu, T.; Heyse, S.; Indesteege, S.; Kerckhof, S.; Koeune, F.; Nad, T.; Plos, T.; Regazzoni, F.; Standaert, F.; and van Oldeneel tot Oldenzeel, L. In Mitrokotsa, A.; and Vaudenay, S., editor(s), Progress in Cryptology - AFRICACRYPT 2012 - 5th International Conference on Cryptology in Africa, Ifrance, Morocco, July 10-12, 2012. Proceedings, volume 7374, of Lecture Notes in Computer Science, pages 172–187, 2012. Springer
Compact Implementation and Performance Evaluation of Block Ciphers in ATtiny Devices [link]Paper   doi   link   bibtex  
Security Enhanced Linux on embedded systems: A hardware-accelerated implementation. Fiorin, L.; Ferrante, A.; Padarnitsas, K.; and Regazzoni, F. In Proceedings of the 17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012, Sydney, Australia, January 30 - February 2, 2012, pages 29–34, 2012. IEEE
Security Enhanced Linux on embedded systems: A hardware-accelerated implementation [link]Paper   doi   link   bibtex  
LEXCOMM: A low energy, secure and flexible communication protocol for a heterogenous body sensor network. Lamichhane, B.; Mudda, S.; Regazzoni, F.; and Puiatti, A. In Proceedings of 2012 IEEE-EMBS International Conference on Biomedical and Health Informatics, Hong Kong, China, January 5-7, 2012, pages 273–276, 2012. IEEE
LEXCOMM: A low energy, secure and flexible communication protocol for a heterogenous body sensor network [link]Paper   doi   link   bibtex  
Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices. Balasch, J.; Ege, B.; Eisenbarth, T.; Gérard, B.; Gong, Z.; Güneysu, T.; Heyse, S.; Kerckhof, S.; Koeune, F.; Plos, T.; Pöppelmann, T.; Regazzoni, F.; Standaert, F.; Assche, G. V.; Keer, R. V.; van Oldeneel tot Oldenzeel, L.; and von Maurich, I. In Mangard, S., editor(s), Smart Card Research and Advanced Applications - 11th International Conference, CARDIS 2012, Graz, Austria, November 28-30, 2012, Revised Selected Papers, volume 7771, of Lecture Notes in Computer Science, pages 158–172, 2012. Springer
Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices [link]Paper   doi   link   bibtex  
Interaction Between Fault Attack Countermeasures and the Resistance Against Power Analysis Attacks. Regazzoni, F.; Breveglieri, L.; Ienne, P.; and Koren, I. In Joye, M.; and Tunstall, M., editor(s), Fault Analysis in Cryptography, of Information Security and Cryptography, pages 257–272. Springer, 2012.
Interaction Between Fault Attack Countermeasures and the Resistance Against Power Analysis Attacks [link]Paper   doi   link   bibtex  
Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices. Balasch, J.; Ege, B.; Eisenbarth, T.; Gérard, B.; Gong, Z.; Güneysu, T.; Heyse, S.; Kerckhof, S.; Koeune, F.; Plos, T.; Pöppelmann, T.; Regazzoni, F.; Standaert, F.; Assche, G. V.; Keer, R. V.; van Oldeneel tot Oldenzeel, L.; and von Maurich, I. IACR Cryptol. ePrint Arch.,507. 2012.
Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices [link]Paper   link   bibtex  
  2011 (6)
Harvesting the potential of nano-CMOS for lightweight cryptography: an ultra-low-voltage 65 nm AES coprocessor for passive RFID tags. Hocquet, C.; Kamel, D.; Regazzoni, F.; Legat, J.; Flandre, D.; Bol, D.; and Standaert, F. J. Cryptogr. Eng., 1(1): 79–86. 2011.
Harvesting the potential of nano-CMOS for lightweight cryptography: an ultra-low-voltage 65 nm AES coprocessor for passive RFID tags [link]Paper   doi   link   bibtex  
Compact FPGA Implementations of the Five SHA-3 Finalists. Kerckhof, S.; Durvaux, F.; Veyrat-Charvillon, N.; Regazzoni, F.; de Dormale, G. M.; and Standaert, F. In Prouff, E., editor(s), Smart Card Research and Advanced Applications - 10th IFIP WG 8.8/11.2 International Conference, CARDIS 2011, Leuven, Belgium, September 14-16, 2011, Revised Selected Papers, volume 7079, of Lecture Notes in Computer Science, pages 217–233, 2011. Springer
Compact FPGA Implementations of the Five SHA-3 Finalists [link]Paper   doi   link   bibtex  
Fresh Re-keying II: Securing Multiple Parties against Side-Channel and Fault Attacks. Medwed, M.; Petit, C.; Regazzoni, F.; Renauld, M.; and Standaert, F. In Prouff, E., editor(s), Smart Card Research and Advanced Applications - 10th IFIP WG 8.8/11.2 International Conference, CARDIS 2011, Leuven, Belgium, September 14-16, 2011, Revised Selected Papers, volume 7079, of Lecture Notes in Computer Science, pages 115–132, 2011. Springer
Fresh Re-keying II: Securing Multiple Parties against Side-Channel and Fault Attacks [link]Paper   doi   link   bibtex  
A first step towards automatic application of power analysis countermeasures. Bayrak, A. G.; Regazzoni, F.; Brisk, P.; Standaert, F.; and Ienne, P. In Stok, L.; Dutt, N. D.; and Hassoun, S., editor(s), Proceedings of the 48th Design Automation Conference, DAC 2011, San Diego, California, USA, June 5-10, 2011, pages 230–235, 2011. ACM
A first step towards automatic application of power analysis countermeasures [link]Paper   doi   link   bibtex